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74LVC2G00PHILIPSN/a20avaiDual 2-input NAND gate


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74LVC2G00
74LVC2G00; Dual 2-input NAND gate

Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
FEATURES
Wide supply voltage range from 1.65Vto 5.5V5 V tolerant outputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65Vto 1.95V) JESD8-5 (2.3Vto 2.7V) JESD8B/JESD36 (2.7Vto 3.6V).
•±24 mA output drive (VCC= 3.0V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5V Multiple package options ESD protection: HBM EIA/JESD22-A114-B exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. Specified from −40°Cto +85°C and −40°Cto +125 °C.
DESCRIPTION

The 74LVC2G00 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3Vor5 V devices.
These feature allows the use of these devices as
translators in a mixed 3.3V and5 V environment.
This device is fully specified for partial power-down
applications using Ioff. TheIoff circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC2G00 provides the 2-input NAND gate.
QUICK REFERENCE DATA

GND=0 V; Tamb =25 °C.
Notes
CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where: = input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts;= number of inputs switching;
Σ(CL× VCC2×fo)= sum of the outputs. The condition is VI= GNDto VCC.
Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
FUNCTION TABLE

See note1.
Note
H= HIGH voltage level;= LOW voltage level.
ORDERING INFORMATION
PINNING
Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referencedto GND (ground=0 V).
Notes
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC=0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
DC CHARACTERISTICS

At recommended operating conditions; voltages are referenced to GND (ground=0 V).
Philips Semiconductors Product specification
Dual 2-input NAND gate 74L VC2G00
Note
All typical values are measured at Tamb =25 °C.
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