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74LVC1G66GMNXP/PHILN/a10000avaiBilateral switch
74LVC1G66GVNXP N/a17941avaiBilateral switch
74LVC1G66GWNXPN/a31200avaiBilateral switch


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74LVC1G66GM-74LVC1G66GV-74LVC1G66GW
Bilateral switch
1. General description
The 74LVC1G66 provides one single pole, single-throw analog switch function. It has two
input/output terminals (Y and Z) and an active HIGH enable input pin (E). When E is LOW,
the analog switch is turned off.
Schmitt-trigger action at the enable input makes the circuit tolerant of slower input rise and
fall times across the entire VCC range from 1.65 V to 5.5 V.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5V Very low ON resistance: 7.5  (typical) at VCC =2.7V 6.5  (typical) at VCC =3.3V6  (typical) at VCC =5V Switch current capability of 32 mA High noise immunity CMOS low power consumption TTL interface compatibility at 3.3 V Latch-up performance meets requirements of JESD78 ClassI ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Enable input accepts voltages up to 5.5 V Multiple package options Specified from 40 Cto+85 C and 40 Cto+125C
3. Ordering information

74L VC1G66
Bilateral switch
Rev. 8 — 2 December 2011 Product data sheet
Table 1. Ordering information

74LVC1G66GW 40Cto +125C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74LVC1G66GV 40Cto +125C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G66GM 40Cto +125C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body1 1.45 0.5 mm SOT886
NXP Semiconductors 74LVC1G66
Bilateral switch
4. Marking

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram

74LVC1G66GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; terminals; body 11 0.5 mm
SOT891
74LVC1G66GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74LVC1G66GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
Table 1. Ordering information …continued
Table 2. Marking

74LVC1G66GW VL
74LVC1G66GV V66
74LVC1G66GM VL
74LVC1G66GF VL
74LVC1G66GN VL
74LVC1G66GS VL
NXP Semiconductors 74LVC1G66
Bilateral switch
6. Pinning information
6.1 Pinning

6.2 Pin description

7. Functional description

[1] H= HIGH voltage level; L= LOW voltage level
Table 3. Pin description
1 1 independent input or output 2 2 independent output or input
GND 3 3 ground (0V) 4 4 enable input (active HIGH)
n.c. - 5 not connected
VCC 5 6 supply voltage
Table 4. Function table[1]

LOFF-state ON-state
NXP Semiconductors 74LVC1G66
Bilateral switch
8. Limiting values

[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions

[1] To avoid sinking GND current from terminal Z when switch current flows in terminal Y, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Y. In this case, there is no limit
for the voltage drop across the switch.
[2] Applies to control signal levels.
Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground= 0 V).
VCC supply voltage 0.5 +6.5 V input voltage [1] 0.5 +6.5 V
IIK input clamping current VI< 0.5 V or VI >VCC +0.5V 50 - mA
ISK switch clamping current VI< 0.5 V or VI >VCC +0.5V - 50 mA
VSW switch voltage enable and disable mode [2] 0.5 VCC +0.5 V
ISW switch current VSW> 0.5 V or VSW ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40Cto +125C [3] -250 mW
Table 6. Recommended operating conditions

VCC supply voltage 1.65 - 5.5 V input voltage 0 - 5.5 V
VSW switch voltage [1] 0- VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and
fall rate
VCC= 1.65Vto 2.7V [2] --20 ns/V
VCC= 2.7Vto 5.5V [2] --10 ns/V
NXP Semiconductors 74LVC1G66
Bilateral switch
10. Static characteristics

[1] All typical values are measured at Tamb =25C.
[2] These typical values are measured at VCC =3.3V.
Table 7. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0V).
VIH HIGH-level
input voltage
VCC= 1.65Vto 1.95V 0.65VCC - - 0.65VCC -V
VCC= 2.3Vto 2.7V 1.7 - - 1.7 - V
VCC= 2.7Vto 3.6V 2.0 - - 2.0 - V
VCC= 4.5Vto 5.5V 0.7VCC - - 0.7VCC -V
VIL LOW-level
input voltage
VCC= 1.65Vto 1.95V - - 0.35VCC -0.35VCCV
VCC= 2.3Vto 2.7V - - 0.7 - 0.7 V
VCC= 2.7Vto 3.6V - - 0.8 - 0.8 V
VCC= 4.5Vto 5.5V - - 0.3VCC -0.3VCCV input leakage
current
pin E; VI= 5.5Vor GND;
VCC=0V to 5.5V
[2] - 0.1 5- 100 A
IS(OFF) OFF-state
leakage
current
VCC= 5.5 V; see Figure7 [2] - 0.1 5- 200 A
IS(ON) ON-state
leakage
current
VCC= 5.5 V; see Figure8 [2] - 0.1 5- 200 A
ICC supply
current = 5.5 Vor GND;
VSW =GNDor VCC;
VCC =1.65Vto5.5V
[2] -0.1 10 - 200 A
ICC additional
supply
current
pin E; VI =VCC 0.6V;
VSW =GNDor VCC; VCC =5.5V
[2] -5 500 - 5000 A input
capacitance 2.0 --- pF
CS(OFF) OFF-state
capacitance 6.5 --- pF
CS(ON) ON-state
capacitance 11 --- pF
NXP Semiconductors 74LVC1G66
Bilateral switch
10.1 Test circuits

10.2 ON resistance

Table 8. ON resistance

At recommended operating conditions; voltages are referenced to GND (ground0 V); for graphs see Figure 10 to Figure 15.
RON(peak) ON resistance (peak) VI =GNDto VCC; see Figure9
ISW =4mA;
VCC= 1.65Vto 1.95V 34.0 130 - 195 
ISW =8mA; VCC= 2.3 V to 2.7V - 12.0 30 - 45 
ISW =12 mA; VCC =2.7V - 10.4 25 - 38 
ISW =24 mA; VCC= 3.0 V to 3.6V - 7.8 20 - 30 
ISW =32 mA; VCC= 4.5 V to 5.5V - 6.2 15 - 23 
RON(rail) ON resistance (rail) VI= GND; see Figure9
ISW =4mA;
VCC= 1.65Vto 1.95V
-8.2 18 - 27 
ISW =8mA; VCC= 2.3 V to 2.7V - 7.1 16 - 24 
ISW =12 mA; VCC= 2.7V - 6.9 14 - 21 
ISW =24 mA; VCC= 3.0 V to 3.6V - 6.5 12 - 18 
ISW =32 mA; VCC= 4.5 V to 5.5V - 5.8 10 - 15  =VCC; see Figure9
ISW =4mA;
VCC= 1.65Vto 1.95V 10.4 30 - 45 
ISW =8mA; VCC= 2.3 V to 2.7V - 7.6 20 - 30 
ISW =12 mA; VCC= 2.7V - 7.0 18 - 27 
ISW =24 mA; VCC= 3.0 V to 3.6V - 6.1 15 - 23 
ISW =32 mA; VCC= 4.5 V to 5.5V - 4.9 10 - 15 
NXP Semiconductors 74LVC1G66
Bilateral switch

[1] Typical values are measured at Tamb= 25 C and nominal VCC.
[2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
10.3 ON resistance test circuit and graphs

RON(flat) ON resistance
(flatness) =GNDto VCC [2]
ISW =4mA;
VCC= 1.65Vto 1.95V
-26.0 - - - 
ISW =8mA; VCC= 2.3 V to 2.7V - 5.0 - - - 
ISW =12 mA; VCC =2.7V - 3.5 - - - 
ISW =24 mA; VCC= 3.0 V to 3.6V - 2.0 - - - 
ISW =32 mA; VCC= 4.5 V to 5.5V - 1.5 - - - 
Table 8. ON resistance …continued

At recommended operating conditions; voltages are referenced to GND (ground0 V); for graphs see Figure 10 to Figure 15.
NXP Semiconductors 74LVC1G66
Bilateral switch

NXP Semiconductors 74LVC1G66
Bilateral switch

11. Dynamic characteristics

Table 9. Dynamic characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0 V); for test circuit see Figure 18.
tpd propagation delay Yto Z or ZtoY;
see Figure16
[2][3]
VCC= 1.65Vto 1.95V - 0.8 2.0 - 3.0 ns
VCC= 2.3Vto 2.7V - 0.4 1.2 - 2.0 ns
VCC= 2.7V - 0.4 1.0 - 1.5 ns
VCC= 3.0Vto 3.6V - 0.3 0.8 - 1.5 ns
VCC= 4.5Vto 5.5V - 0.2 0.6 - 1.0 ns
ten enable time E to Y or Z; see Figure17 [4]
VCC= 1.65Vto 1.95V 1.0 5.3 12 1.0 15.5 ns
VCC= 2.3Vto 2.7V 1.0 3.0 6.5 1.0 8.5 ns
VCC= 2.7V 1.0 2.6 6.0 1.0 8.0 ns
VCC= 3.0Vto 3.6V 1.0 2.5 5.0 1.0 6.5 ns
VCC= 4.5Vto 5.5V 1.0 1.9 4.2 1.0 5.5 ns
NXP Semiconductors 74LVC1G66
Bilateral switch

[1] Typical values are measured at Tamb =25 C and nominal VCC.
[2] tpd is the same as tPLH and tPHL
[3] propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when
driven by an ideal voltage source (zero output impedance).
[4] ten is the same as tPZH and tPZL
[5] tdis is the same as tPLZ and tPHZ
[6] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N+ {(CL +CS(ON)) VCC2 fo} where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
CS(ON)= maximum ON-state switch capacitance in pF;
VCC= supply voltage in V;
N = number of inputs switching;
{(CL +CS(ON))  VCC2 fo} = sum of the outputs.
11.1 Waveforms and test circuit

tdis disable time E to Y or Z; see Figure17 [5]
VCC= 1.65Vto 1.95V 1.0 4.2 10 1.0 13 ns
VCC= 2.3Vto 2.7V 1.0 2.4 6.9 1.0 9.0 ns
VCC= 2.7V 1.0 3.6 7.5 1.0 9.5 ns
VCC= 3.0Vto 3.6V 1.0 3.4 6.5 1.0 8.5 ns
VCC= 4.5Vto 5.5V 1.0 2.5 5.0 1.0 6.5 ns
CPD power dissipation
capacitance =50pF; fi =10MHz; =GNDto VCC
[6]
VCC =2.5V - 9.8 - - - pF
VCC =3.3V - 12.0 - - - pF
VCC =5.0V - 17.3 - - - pF
Table 9. Dynamic characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground=0 V); for test circuit see Figure 18.
NXP Semiconductors 74LVC1G66
Bilateral switch

Table 10. Measurement points

1.65Vto 1.95V 0.5VCC 0.5VCC VOL + 0.15 V VOH  0.15 V
2.3Vto 2.7V 0.5VCC 0.5VCC VOL + 0.15 V VOH  0.15 V
2.7V 1.5V 1.5V VOL + 0.3 V VOH  0.3 V
3.0Vto 3.6V 1.5V 1.5 V VOL + 0.3 V VOH  0.3 V
4.5Vto 5.5V 0.5VCC 0.5VCC VOL + 0.3 V VOH  0.3 V
NXP Semiconductors 74LVC1G66
Bilateral switch

11.2 Additional dynamic characteristics

Table 11. Test data

1.65 V to 1.95V VCC  2.0ns 30pF 1k open GND 2VCC
2.3 V to 2.7V VCC  2.0ns 30pF 500 open GND 2VCC
2.7V 2.7 V  2.5ns 50pF 500 open GND 6 V
3.0 V to 3.6V 2.7 V  2.5ns 50pF 500 open GND 6 V
4.5 V to 5.5V VCC  2.5ns 50pF 500 open GND 2VCC
Table 12. Additional dynamic characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0 V); Tamb =25 C.
THD total harmonic distortion RL =10k; CL =50pF; fi=1 kHz;
see Figure19
VCC =1.65V - 0.032 - %
VCC= 2.3V - 0.008 - %
VCC= 3.0V - 0.006 - %
VCC= 4.5V - 0.001 - % =10k; CL =50pF; fi =10kHz;
see Figure19
VCC =1.65V - 0.068 - %
VCC= 2.3V - 0.009 - %
VCC= 3.0V - 0.008 - %
VCC= 4.5V - 0.006 - %
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