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74LVC1G126GMNXPN/a3000avaiBus buffer/line driver; 3-state
74LVC1G126GVNXP/PHILIPSN/a12000avaiBus buffer/line driver; 3-state
74LVC1G126GWNXPN/a31200avaiBus buffer/line driver; 3-state


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74LVC1G126GM-74LVC1G126GV-74LVC1G126GW
Bus buffer/line driver; 3-state
1. General description
The 74LVC1G126 provides one non-inverting buffer/line driver with 3-state output. The
3-state output is controlled by the output enable input (OE). A LOW-level at pin OE
causes the output to assume a high-impedance OFF-state.
The input can be driven from either 3.3 Vor5 V devices. This feature allows the use of
this device in a mixed 3.3V and5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65Vto 5.5V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) 24 mA output drive (VCC =3.0V) ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200 V CMOS low power consumption Inputs accept voltages up to 5V Latch-up performance exceeds 250 mA Direct interface with TTL levels Multiple package options Specified from 40 Cto+85 C and 40 Cto +125 C
74L VC1G126
Bus buffer/line driver; 3-state
Rev. 12 — 2 July 2012 Product data sheet
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
3. Ordering information

4. Marking

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram

Table 1. Ordering information

74LVC1G126GW 40 Cto+125C TSSOP5 plastic thin shrink small outline package; leads; body width 1.25 mm
SOT353-1
74LVC1G126GV 40 Cto+125C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G126GM 40 Cto+125C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 1  1.45  0.5 mm
SOT886
74LVC1G126GF 40 C to +125 C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 11 0.5 mm
SOT891
74LVC1G126GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74LVC1G126GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
74LVC1G126GX 40 C to +125C X2SON5 X2SON5: plastic thermal enhanced extremely
thin small outline package; no leads; 5
terminals; body 0.8 0.8 0.35 mm
SOT1226
Table 2. Marking codes

74LVC1G126GW VN
74LVC1G126GV V26
74LVC1G126GM VN
74LVC1G126GF VN
74LVC1G126GN VN
74LVC1G126GS VN
74LVC1G126GX VN
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
6. Pinning information
6.1 Pinning

6.2 Pin description

Table 3. Pin description
1 1 output enable input 2 2 data input
GND 3 3 ground (0 V) 4 4 data output
n.c. - 5 not connected
VCC 5 6 supply voltage
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
7. Functional description

[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
8. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC=0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 package: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
Table 4. Function table[1]
L
HHH Z
Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - 50 mA output voltage Active mode [1][2] 0.5 VCC + 0.5 V
Power-down mode [1][2] 0.5 +6.5 V output current VO = 0 V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb= 40 C to +125C [3]- 250 mW
Tstg storage temperature 65 +150 C
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
9. Recommended operating conditions
Table 6. Recommended operating conditions
VCC supply voltage 1.65 - 5.5 V input voltage 0 - 5.5 V output voltage Active mode 0 - VCC V
VCC = 0 V; Power-down mode 0 - 5.5 V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V
VCC = 2.7 V to 5.5 V - - 10 ns/V
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb=
40 Cto+85C
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65  VCC -- V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7  VCC -- V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3  VCC V
VOL LOW-level output voltage VI =VIHorVIL
VCC = 1.65 V to 5.5 V; IO = 100 A- - 0.1 V
VCC = 1.65 V; IO = 4 mA - - 0.45 V
VCC = 2.3 V; IO = 8 mA - - 0.3 V
VCC = 2.7 V; IO = 12 mA - - 0.4 V
VCC = 3.0 V; IO = 24 mA - - 0.55 V
VCC = 4.5 V; IO = 32 mA - - 0.55 V
VOH HIGH-level output voltage VI =VIHorVIL
VCC = 1.65 V to 5.5 V; IO = 100 AVCC  0.1 - - V
VCC = 1.65 V; IO = 4 mA 1.2 - - V
VCC = 2.3 V; IO = 8 mA 1.9 - - V
VCC = 2.7 V; IO = 12 mA 2.2 - - V
VCC = 3.0 V; IO = 24 mA 2.3 - - V
VCC = 4.5 V; IO = 32 mA 3.8 - - V input leakage current VCC = 0 V to 5.5 V; VI =5.5V orGND - 0.1 5 A
IOZ OFF-state output current VCC = 3.6 V; VI = VIH or VIL; =5.5V or GND 0.1 10 A
IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - 0.1 10 A
ICC supply current VI= 5.5Vor GND;
VCC= 1.65Vto 5.5V; IO =0A
-0.1 10 A
ICC additional supply current per pin; VCC = 2.3 V to 5.5 V; =VCC  0.6 V; IO = 0 A 5 500 A input capacitance - 5 - pF
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state

[1] All typical values are measured at VCC=3.3 V and Tamb =25C.
Tamb=
40Cto +125C
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65  VCC -- V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7  VCC -- V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3  VCC V
VOL LOW-level output voltage VI =VIHorVIL
VCC = 1.65 V to 5.5 V; IO = 100 A- - 0.1 V
VCC = 1.65 V; IO = 4 mA - - 0.70 V
VCC = 2.3 V; IO = 8 mA - - 0.45 V
VCC = 2.7 V; IO = 12 mA - - 0.60 V
VCC = 3.0 V; IO = 24 mA - - 0.80 V
VCC = 4.5 V; IO = 32 mA - - 0.80 V
VOH HIGH-level output voltage VI =VIHorVIL
VCC = 1.65 V to 5.5 V; IO = 100 AVCC  0.1 - - V
VCC = 1.65 V; IO = 4 mA 0.95 - - V
VCC = 2.3 V; IO = 8 mA 1.7 - - V
VCC = 2.7 V; IO = 12 mA 1.9 - - V
VCC = 3.0 V; IO = 24 mA 2.0 - - V
VCC = 4.5 V; IO = 32 mA 3.4 - - V input leakage current VCC = 0 V to 5.5 V; VI =5.5V orGND - - 100 A
IOZ OFF-state output current VCC = 3.6 V; VI = VIH or VIL; =5.5V or GND 200 A
IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - - 200 A
ICC supply current VI= 5.5Vor GND;
VCC= 1.65Vto 5.5V; IO =0A - 200 A
ICC additional supply current per pin; VCC = 2.3 V to 5.5 V; =VCC  0.6 V; IO = 0 A 5000 A
Table 7. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
11. Dynamic characteristics

[1] Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL
[3] ten is the same as tPZH and tPZL
[4] tdis is the same as tPLZ and tPHZ
[5] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance inpF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
Table 8. Dynamic characteristics

Voltages are referenced to GND (ground=0 V). For test circuit see Figure 10.
tpd propagation delay A to Y; see Figure8 [2]
VCC = 1.65 V to 1.95 V 1.0 3 8.0 1.0 10.5 ns
VCC = 2.3 V to 2.7 V 0.5 2.1 5.5 0.5 7 ns
VCC = 2.7 V 0.5 2.3 5.5 0.5 7 ns
VCC = 3.0 V to 3.6 V 0.5 2.0 4.5 0.5 6 ns
VCC = 4.5 V to 5.5 V 0.5 1.7 4.0 0.5 5.5 ns
ten enable time OE to Y; see Figure9 [3]
VCC = 1.65 V to 1.95 V 1.0 3.2 9.4 1.0 12 ns
VCC = 2.3 V to 2.7 V 0.5 2.2 6.6 0.5 8.5 ns
VCC = 2.7 V 0.5 2.4 6.6 0.5 8.5 ns
VCC = 3.0 V to 3.6 V 0.5 2.1 5.3 0.5 7 ns
VCC = 4.5 V to 5.5 V 0.5 1.6 5.0 0.5 6.5 ns
tdis disable time OE to Y; see Figure9 [4]
VCC = 1.65 V to 1.95 V 1.0 4.3 9.2 1.0 12 ns
VCC = 2.3 V to 2.7 V 0.5 2.7 5.5 0.5 7 ns
VCC = 2.7 V 0.5 3.4 5.5 0.5 7 ns
VCC = 3.0 V to 3.6 V 0.5 3.0 5.5 0.5 7 ns
VCC = 4.5 V to 5.5 V 0.5 2.2 4.2 0.5 5.5 ns
CPD power dissipation
capacitance
per buffer; VI = GND to VCC [5]
output enabled - 25 - - - pF
output disabled - 6 - - - pF
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
12. Waveforms

Table 9. Measurement points

1.65Vto 1.95V 0.5VCC 0.5VCC VOL + 0.15 V VOH  0.15 V
2.3Vto 2.7V 0.5VCC 0.5VCC VOL + 0.15 V VOH  0.15 V
2.7V 1.5 V 1.5 V VOL + 0.3 V VOH  0.3 V
3.0Vto 3.6V 1.5 V 1.5 V VOL + 0.3 V VOH  0.3 V
4.5Vto 5.5V 0.5VCC 0.5VCC VOL + 0.3 V VOH  0.3 V
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state

Table 10. Test data

1.65 V to 1.95V VCC  2.0ns 30pF 1k open GND 2VCC
2.3 V to 2.7V VCC  2.0ns 30pF 500 open GND 2VCC
2.7V 2.7 V  2.5ns 50pF 500 open GND 6 V
3.0 V to 3.6V 2.7 V  2.5ns 50pF 500 open GND 6 V
4.5 V to 5.5V VCC  2.5ns 50pF 500 open GND 2VCC
NXP Semiconductors 74LVC1G126
Bus buffer/line driver; 3-state
13. Package outline

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