74LVC1G06GV-74LVC1G06GW Fast Delivery |IC PHOENIX CO.,LIMITED

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74LVC1G06GV-74LVC1G06GW
inverter with open-drain output
1. General description
The 74LVC1G06 provides the inverting buffer.
Input can be driven from either 3.3Vor5 V devices. These features allow the use of
these devices in a mixed 3.3V and5 V environment.
Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall
time.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The output of the device is an open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
2. Features and benefits Wide supply voltage range from 1.65Vto 5.5V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) 24 mA output drive (VCC =3.0V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5V Multiple package options ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200 V Specified from 40 Cto +125 C
74L VC1G06
Inverter with open-drain output
Rev. 10 — 29 June 2012 Product data sheet
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
74LVC1G06GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; leads; body width 1.25 mm
SOT353-1
74LVC1G06GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G06GM 40 C to +125 C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 1  1.45  0.5 mm
SOT886
74LVC1G06GF 40 C to +125 C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 11 0.5 mm
SOT891
74LVC1G06GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74LVC1G06GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
74LVC1G06GX 40 C to +125C X2SON5 X2SON5: plastic thermal enhanced extremely
thin small outline package; no leads; 5
terminals; body 0.8 0.8 0.35 mm
SOT1226
Table 2. Marking codes
74LVC1G06GW VR
74LVC1G06GV V06
74LVC1G06GM VR
74LVC1G06GF VR
74LVC1G06GN VR
74LVC1G06GS VR
74LVC1G06GX VR
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 3. Pin description
n.c. 1 1 not connected 2 2 data input
GND 3 3 ground (0 V) 4 4 data output
n.c. - 5 not connected
VCC 5 6 supply voltage
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC=0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 package: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 4. Function table[1]
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO >VCC or VO < 0V - 50 mA output voltage Active mode and Power-down
mode
[1][2] 0.5 +6.5 V
IO(sink/source) output sink or source current VO = 0 V to VCC - 50 mA
ICC supply current - +100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 C to +125C [3] -250 mW
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 1.65 - 5.5 V input voltage 0 - 5.5 V output voltage Active mode 0 - 5.5 V
Power-down mode; VCC = 0 V 0 - 5.5 V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V
VCC = 2.7 V to 5.5 V - - 10 ns/V
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
10. Static characteristics
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 C.
Table 7. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground=0V).
VIH HIGH-level
input voltage
VCC = 1.65 V to 1.95 V 0.65VCC - - 0.65VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC -V
VIL LOW-level
input voltage
VCC = 1.65 V to 1.95 V - - 0.35VCC - 0.35VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3VCC -0.3VCC V
VOL LOW-level
output voltage = VIH or VIL = 100 A;
VCC =1.65Vto5.5 V - 0.10 - 0.10 V = 4 mA; VCC= 1.65 V - - 0.45 - 0.70 V = 8 mA; VCC= 2.3 V - - 0.30 - 0.45 V = 12 mA; VCC= 2.7 V - - 0.40 - 0.60 V = 24 mA; VCC= 3.0 V - - 0.55 - 0.80 V = 32 mA; VCC= 4.5 V - - 0.55 - 0.80 V input leakage
current
VI = 5.5 V or GND;
VCC =0Vto5.5V 0.1 5- 100 A
IOFF power-off
leakage
current or VO = 5.5 V; VCC =0 V - 0.1 10 - 200 A
ICC supply current VI = 5.5 V or GND; IO = 0 A;
VCC =1.65Vto5.5 V 0.1 10 - 200 A
ICC additional
supply current =VCC  0.6 V; IO =0A;
VCC= 2.3Vto 5.5 V; perpin 5 500 - 5000 A input
capacitance
VCC= 3.3 V; VI =GNDto VCC -5 - - - pF
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
11. Dynamic characteristics
[1] Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLZ and tPZL.
[3] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance inpF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
12. Waveforms
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground=0 V); for load circuit see Figure9.
tpd propagation delay A to Y; see Figure8 [2]
VCC = 1.65 V to 1.95 V 1.0 3 6.5 1.0 8.5 ns
VCC = 2.3 V to 2.7 V 0.5 1.9 4 0.5 5.5 ns
VCC = 2.7 V 0.5 2.5 4.5 0.5 6 ns
VCC = 3.0 V to 3.6 V 0.5 2.3 4 0.5 5.5 ns
VCC = 4.5 V to 5.5 V 0.5 1.7 3 0.5 4 ns
CPD power dissipation
capacitance
VI = GND to VCC; VCC= 3.3 V [3] -14- - - pF
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
Table 9. Measurement points
1.65 V to 1.95 V 0.5VCC 0.5VCC VOL + 0.15 V
2.3 V to 2.7 V 0.5VCC 0.5VCC VOL + 0.15 V
2.7 V 1.5 V 1.5 V VOL + 0.3 V
3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V
4.5 V to 5.5 V 0.5VCC 0.5VCC VOL + 0.3 V
Table 10. Test data
1.65 V to 1.95 V VCC  2.0ns 30 pF 1 k 2VCC
2.3 V to 2.7 V VCC  2.0ns 30 pF 500  2VCC
2.7 V 2.7 V  2.5ns 50 pF 500  6 V
3.0 V to 3.6 V 2.7 V  2.5ns 50 pF 500  6 V
4.5 V to 5.5 V VCC  2.5ns 50 pF 500  2VCC
NXP Semiconductors 74LVC1G06
Inverter with open-drain output
13. Package outline
NXP Semiconductors 74LVC1G06
Inverter with open-drain output

Partno	Mfg	Dc	Qty	Available	Descript
74LVC1G06GV	NXP/PHILIPS	N/a	3000	avai	inverter with open-drain output
74LVC1G06GV	NXP	N/a	35	avai	inverter with open-drain output
74LVC1G06GW	NXP	N/a	1740	avai	inverter with open-drain output