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74LV595DB-74LV595N-74LV595PW
8-bit serial-in/serial or parallel-out shift register with output latches 3-State
Product specification 1998 Apr 20
IC24 Data Handbook
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
FEATURES Optimized for Low Voltage applications: 1.0V to 3.6V Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V,
Tamb = 25°C Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V,
Tamb = 25°C 8-bit serial input 8-bit serial or parallel output Storage register with 3-State outputs Shift register with direct clear Output capability:
– parallel outputs; bus driver
– serial output; standard ICC category: MSI
APPLICATIONS Serial-to-parallel data conversion Remote control holding register
DESCRIPTIONThe 74LV595 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT595.
The74LV595 is an 8-stage serial shift register with a storage register
and 3-State outputs. The shift register and storage register have
separate clocks.
Data is shifted on the positive-going transitions of the SHCP input.
The data in each register is transferred to the storage register on a
positive-going transition of the STCP input. If both clocks are
connected together, the shift register will always be one clock pulse
ahead of the storage register.
The shift register has a serial input (DS) and a serial standard output
(Q7’) all for cascading. It is also provided with asynchronous reset
(active LOW) for all 8 shift register stages. The storage register has
8 parallel 3-State bus driver outputs. Data in the storage register
appears at the output whenever the output enable input (OE) is
LOW.
QUICK REFERENCE DATAGND = 0V; Tamb = 25°C; tr =tf 2.5 ns
NOTES: CPD is used to determine the dynamic power dissipation (PD in μW)
PD = CPD VCC2 x fi (CL VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
(CL VCC2 fo) = sum of the outputs. The condition is VI = GND to VCC.
ORDERING AND PACKAGE INFORMATION
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
PIN DESCRIPTION
PIN CONFIGURATION
FUNCTION TABLE = HIGH voltage level = LOW voltage level = Don’t care = High impedance OFF-state
NC= No change = LOW-to-HIGH clock transition = HIGH-to-LOW transition
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
FUNCTIONAL DIAGRAM
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
LOGIC DIAGRAM
TIMING DIAGRAM
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
RECOMMENDED OPERATING CONDITIONS
NOTE: The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC =3.6V.
ABSOLUTE MAXIMUM RATINGS1, 2In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
NOTES: Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICSOver recommended operating conditions voltages are referenced to GND (ground = 0V)
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
DC CHARACTERISTICS (Continued)Over recommended operating conditions voltages are referenced to GND (ground = 0V)
NOTE: All typical values are measured at Tamb = 25°C.
AC CHARACTERISTICSGND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
Philips Semiconductors Product specification
74LV5958-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
AC CHARACTERISTICS (Continued)GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
NOTES: Unless otherwise stated, all typical values are at Tamb = 25°C. Typical value measured at VCC = 3.3V.
