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74LV4066PWNXPN/a36220avaiQuad bilateral switches


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74LV4066PW
Quad bilateral switches
General descriptionThe 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible
with the 74HC4066 and 74HCT4066.
The 74LV4066 has four independent switches. Each switch has two input/output pins
(nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding
analog switch is turned off.
The 74LV4066 hasa ON-resistance whichis reducedin comparison with the 74HCT4066. Features Optimized for low-voltage applications: 1.0 V to 3.6V Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25°C Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6V Very low ON-resistance: 60 Ω (typical) at VCC= 2.0V 35 Ω (typical) at VCC= 3.0V 25 Ω (typical) at VCC= 4.5V ESD protection: HBM EIA/JESD22-A114C exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V Specified from −40 °Cto+80 °C and from −40°Cto +125°C
74L V4066
Quad bilateral switches
Philips Semiconductors 74L V4066 Quick reference data
[1] CPDis used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ Σ[(CL +CS)× VCC2× fo] where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;= maximum switch capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
Σ[(CL +CS)× VCC2×fo]= sum of the outputs.
[2] The condition is VI= GND to VCC. Ordering information
Table 1: Quick reference data

GND=0 V; Tamb =25 °C; tr =tf≤ 2.5 ns; CL=15 pF; RL =1kΩ.
tPZL, tPZH turn-on time nE to Vos VCC= 3.3V - 10 - ns
tPLZ, tPHZ turn-off time nE to Vos VCC= 3.3V - 13 - ns input capacitance - 3.5 - pF maximum switch
capacitance -pF
CPD power dissipation
capacitance per switch
VCC= 3.3V [1][2] -11 - pF
Table 2: Ordering information

74LV4066N −40 °C to +125°C DIP14 plastic dual in-line package; leads (300 mil)
SOT27-1
74LV4066D −40 °C to +125°C SO14 plastic small outline package; leads; body width 3.9 mm
SOT108-1
74LV4066DB −40 °C to +125°C SSOP14 plastic shrink small outline package;
14 leads; body width 5.3 mm
SOT337-1
74LV4066PW −40 °C to +125°C TSSOP14 plastic thin shrink small outline
package; 14 leads; body width
4.4 mm
SOT402-1
Philips Semiconductors 74L V4066 Functional diagram
Philips Semiconductors 74L V4066 Pinning information
6.1 Pinning
6.2 Pin description Functional description
7.1 Function table
Table 3: Pin description
1 independent input or output 2 independent output or input 3 independent output or input 4 independent input or output 5 enable input 6 enable input
GND 7 ground (0V) 8 independent input or output 9 independent output or input 10 independent output or input 11 independent input or output 12 enable input 13 enable input
VCC 14 supply voltage
Table 4: Function table

LOW off
HIGH on
Philips Semiconductors 74L V4066 Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] DIP14 package: Ptot derates linearly with 12 mW/K above 70°C.
[3] SO14 package: Ptot derates linearly with 8 mW/K above 70°C.
[4] (T)SSOP14 package: Ptot derates linearly with 5.5 mW/K above 60°C. Recommended operating conditions
[1] The static characteristicsare guaranteed from VCC=1.2Vto VCC=5.5V,butLV devicesare guaranteedto
function down to VCC = 1.0 V (with input levels GND or VCC).
Table 5: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0V).
VCC supply voltage −0.5 +7.0 V
IIK input diode current VI< −0.5 V or VI > VCC + 0.5V - ±20 mA
IOK output diode current VO< −0.5 V or VO > VCC + 0.5V - ±50 mA switch source or sink
current= −0.5 V to (VCC + 0.5V) [1]- ±25 mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb= −40 °C to +125°C
DIP14 package [2]- 750 mW
SO14 package [3]- 500 mW
(T)SSOP14 package [4] 400 mW
Table 6: Recommended operating conditions

VCC supply voltage [1] 1.0 3.3 6 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature in free air −40 - +125 °C
tr, tf input rise and fall times VCC= 1.0 V to 2.0V - - 500 ns/V
VCC= 2.0 V to 2.7V - - 200 ns/V
VCC= 2.7 V to 3.6V - - 100 ns/V
VCC= 3.6 V to 5.5V - - 50 ns/V
Philips Semiconductors 74L V4066
10. Static characteristics
Table 7: Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb =
−40 °C to +85°C
VIH HIGH-level input voltage VCC = 1.2V 0.90 - - V
VCC = 2.0V 1.40 - - V
VCC = 2.7 V to 3.6V 2.00 - - V
VCC = 4.5V 3.15 - - V
VCC = 6.0V 4.20 - - V
VIL LOW-level input voltage VCC = 1.2V - - 0.30 V
VCC = 2.0V - - 0.60 V
VCC = 2.7 V to 3.6V - - 0.80 V
VCC = 4.5V - - 1.35 V
VCC = 6.0V - - 1.80 V
ILI input leakage current VI = VCC or GND
VCC= 3.6V - - 1.0 μA
VCC= 6.0V - - 2.0 μA
IS(OFF) analog switch OFF-state
current
VI = VIH or VIL; see Figure5
VCC = 3.6V - - 1.0 μA
VCC = 6.0V - - 2.0 μA
IS(ON) analog switch ON-state
current
VI = VIH or VIL; see Figure6
VCC = 3.6V - - 1.0 μA
VCC = 6.0V - - 2.0 μA
ICC supply current VI = VCC or GND; IO = 0A
VCC = 3.6V - - 20 μA
VCC = 6.0V - - 40 μA
ΔICC additional supply current
per input
VI = VCC − 0.6V;
VCC= 2.7 V to 3.6V - 500 μA input capacitance - 3.5 - pF
Tamb =
−40 °C to +125°C
VIH HIGH-level input voltage VCC = 1.2V 0.90 - - V
VCC = 2.0V 1.40 - - V
VCC = 2.7 V to 3.6V 2.00 - - V
VCC = 4.5V 3.15 - - V
VCC = 6.0V 4.20 V
VIL LOW-level input voltage VCC = 1.2V - - 0.30 V
VCC = 2.0V - - 0.60 V
VCC = 2.7 V to 3.6V - - 0.80 V
VCC = 4.5V - - 1.35 V
VCC = 6.0V - - 1.80 V
Philips Semiconductors 74L V4066
ILI input leakage current VI = VCC or GND
VCC= 3.6V - - 1.0 μA
VCC= 6.0V - - 2.0 μA
IS(OFF) analog switch OFF-state
current
VI = VIH or VIL; see Figure5
VCC = 3.6V - - 1.0 μA
VCC = 6.0V - - 2.0 μA
IS(ON) analog switch ON-state
current
VI = VIH or VIL; see Figure6
VCC = 3.6V - - 1.0 μA
VCC = 6.0V - - 2.0 μA
ICC supply current VI = VCC or GND; IO = 0A
VCC = 3.6V - - 40 μA
VCC = 6.0V - - 80 μA
ΔICC additional supply current
per input
VI = VCC − 0.6V;
VCC= 2.7 V to 3.6V - 850 μA
Table 7: Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors 74L V4066
Table 8: ON-resistance

At recommended operating conditions; voltages are referenced to GND (ground=0 V); for test
circuit see Figure7.
Tamb =
−40 °C to +85°C[1] Figure8
RON(peak) ON-resistance (peak) VI = VIH or VIL
VCC= 1.2V [2]- 300- Ω
VCC= 2.0V - 60 130 Ω
VCC= 2.7V - 41 60 Ω
VCC= 3.0 V to 3.6V - 37 72 Ω
VCC= 4.5V - 25 52 Ω
VCC= 6.0V - 23 47 Ω
RON(rail) ON-resistance (rail) VI = VIH or VIL; Vis= GND
VCC= 1.2V [2] -75 - Ω
VCC= 2.0V - 35 98 Ω
VCC= 2.7V - 26 60 Ω
VCC= 3.0 V to 3.6V - 24 52 Ω
VCC= 4.5V - 15 40 Ω
VCC= 6.0V - 13 35 Ω
VI = VIH or VIL; Vis =VCC
VCC= 1.2V [2] -75 - Ω
VCC= 2.0V - 40 110 Ω
VCC= 2.7V - 35 72 Ω
VCC= 3.0 V to 3.6V - 30 65 Ω
VCC= 4.5V - 22 47 Ω
VCC= 6.0V - 20 40 Ω
RON(flatness) ON-resistance
(flatness)
VI = VIH or VIL; Vis =VCC
VCC= 2.0V - 5 - Ω
VCC= 2.7V - 4 - Ω
VCC= 3.0 V to 3.6V - 4 - Ω
VCC= 4.5V - 3 - Ω
VCC= 6.0V - 2 - Ω
Tamb =
−40 °C to +125°C
RON(peak) ON-resistance (peak) VI = VIH or VIL
VCC= 2.0V - - 150 Ω
VCC= 2.7V - - 90 Ω
VCC= 3.0 V to 3.6V - - 83 Ω
VCC= 4.5V - - 60 Ω
VCC= 6.0V - - 54 Ω
Philips Semiconductors 74L V4066
[1] All typical values are measured at Tamb = 25°C.
[2] At supply voltage approaching 1.2 V, the analog switch ON-resistance becomes extremely non-linear.
Therefore it is recommended that these devices be used to transmit digital signals only, when using these
supply voltages.
RON(rail) ON-resistance (rail) VI = VIH or VIL; Vis= GND
VCC= 2.0V - - 115 Ω
VCC= 2.7V - - 68 Ω
VCC= 3.0 V to 3.6V - - 60 Ω
VCC= 4.5V - - 45 Ω
VCC= 6.0V - - 40 Ω
VI = VIH or VIL; Vis =VCC
VCC= 2.0V - - 130 Ω
VCC= 2.7V - - 85 Ω
VCC= 3.0 V to 3.6V - - 75 Ω
VCC= 4.5V - - 55 Ω
VCC= 6.0V - - 47 Ω
Table 8: ON-resistance …continued

At recommended operating conditions; voltages are referenced to GND (ground=0 V); for test
circuit see Figure7.
Philips Semiconductors 74L V4066
11. Dynamic characteristics
Table 9: Dynamic characteristics

Voltages are referenced to GND (ground =0 V); for test circuit see Figure 11.
Tamb =
−40 °C to +85°C[1]
tPHL,
tPLH
propagation delay Vis to Vos see Figure9
VCC = 1.2V - 8 - ns
VCC = 2.0V - 5 26 ns
VCC = 2.7 V to 3.6V - 3 15 ns
VCC = 4.5V - 2 13 ns
VCC = 6.0V - 2 10 ns
tPZH,
tPZL
turn-on time nE to Vos see Figure9
VCC = 1.2V - 40 - ns
VCC = 2.0V - 22 43 ns
VCC = 2.7 V to 3.6V - 12 25 ns
VCC= 3.3V;CL=15pF - 10 - ns
VCC = 4.5V - 10 21 ns
VCC = 6.0V - 8 16 ns
tPHZ,
tPLZ
turn-off time nE to Vos see Figure9
VCC = 1.2V - 50 - ns
VCC = 2.0V - 27 65 ns
VCC = 2.7 V to 3.6V - 15 38 ns
VCC= 3.3V;CL=15pF - 13 - ns
VCC = 4.5V - 13 32 ns
VCC = 6.0V - 12 28 ns
CPD power dissipation
capacitance per switch
VCC = 3.3 V; CL =15pF [2][3] -11 - pF
Tamb =
−40 °C to +125°C
tPHL,
tPLH
propagation delay Vis to Vos see Figure9
VCC = 2.0V - - 31 ns
VCC = 2.7 V to 3.6V - - 18 ns
VCC = 4.5V - - 15 ns
VCC = 6.0V - - 12 ns
tPZH,
tPZL
turn-on time nE to Vos see Figure9
VCC = 2.0V - - 51 ns
VCC = 2.7 V to 3.6V - - 30 ns
VCC = 4.5V - - 26 ns
VCC = 6.0V - - 20 ns
Philips Semiconductors 74L V4066
[1] Typical values are measured at nominal VCC and Tamb = 25°C.
[2] CPDis used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ Σ[(CL +CS)× VCC2× fo] where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;= maximum switch capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
Σ[(CL +CS)× VCC2×fo]= sum of the outputs.
[3] The condition is VI= GND to VCC.
tPHZ,
tPLZ
turn-off time nE to Vos see Figure9
VCC = 2.0V - - 81 ns
VCC = 2.7 V to 3.6V - - 47 ns
VCC = 4.5V - - 40 ns
VCC = 6.0V - - 34 ns
Table 9: Dynamic characteristics …continued

Voltages are referenced to GND (ground =0 V); for test circuit see Figure 11.
Philips Semiconductors 74L V4066
12. Waveforms
Table 10: Measurement points

≥ 2.7 V 1.5 V 1.5 V VOL + 0.3 VOH − 0.3 V 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 VOH − 0.15 V
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