74LV138PW Fast Delivery |IC PHOENIX CO.,LIMITED

74LV138PW ,3-to-8 line decoder/demultplexer; invertingGeneral descriptionThe 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compat ..
74LV138PW ,3-to-8 line decoder/demultplexer; inverting
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74LV138PW
3-to-8 line decoder/demultplexer; inverting
General descriptionThe 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC138 and 74HCT138.
The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted
address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive
active LOW outputs (Y0to Y7).
There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3).
Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the device to a 1-of-32 linesto32 lines) decoder with just four 74L V138 devices and one inverter. The
74LV138 can be used as an eight output demultiplexer by using one of the active LOW
enable inputs as the data input and the remaining enable inputs as strobes. Unused
enable inputs must be permanently tied to their appropriate active HIGH or LOW state. Features Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25°C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb =25°C Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active LOW mutually exclusive outputs ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Speciﬁed from −40 °Cto+85 °C and from −40°Cto +125°C
74L V138
3-to-8 line decoder/demultiplexer; inverting
Rev. 03 — 15 November 2007 Product data sheet
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting Ordering information Functional diagram
Table 1. Ordering information
74LV138N −40°Cto +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV138D −40°Cto +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LV138DB −40°Cto +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LV138PW −40°Cto +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LV138BQ −40°Cto +125°C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad ﬂat package; no leads; 16 terminals;
body 2.5× 3.5 × 0.85 mm
SOT763-1
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting Pinning information
5.1 Pinning
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting
5.2 Pin description Functional description Limiting values
Table 2. Pin description 1 address input 2 address input 3 address input 4 enable input (active LOW) 5 enable input (active LOW) 6 enable input (active HIGH)
GND 8 ground (0V)
Y0 toY7 15, 14, 13, 12, 11, 10, 9, 7 output
VCC 16 supply voltage
Table 3. Function table= HIGH voltage level; L= LOW voltage level; X= don’t care
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5 V orVI >VCC+ 0.5V [1]- ±20 mA
IOK output clamping current VO< −0.5 V orVO >VCC+ 0.5V [1]- ±50 mA output current VO = −0.5 V to (VCC+ 0.5V) - ±25 mA
ICC supply current - 50 mA
IGND ground current −50 - mA
Tstg storage temperature −65 +150 °C
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 12 mW/K above 70°C.
[3] Ptot derates linearly with 8 mW/K above 70°C.
[4] Ptot derates linearly with 5.5 mW/K above 60°C.
[5] Ptot derates linearly with 4.5 mW/K above 60°C. Recommended operating conditions
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to
VCC=1.0 V (with input levels GND or VCC). Static characteristics
Ptot total power dissipation Tamb = −40 °C to +125°C
DIP16 package [2]- 750 mW
SO16 package [3]- 500 mW
(T)SSOP16 package [4]- 500 mW
DHVQFN16 package [5]- 500 mW
Table 4. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage[1] 1.0 3.3 5.5 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V
VCC = 2.0 V to 2.7 V - - 200 ns/V
VCC = 2.7 V to 3.6 V - - 100 ns/V
VCC = 3.6 V to 5.5 V - - 50 ns/V
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - 0.9 - V
VCC = 2.0 V 1.4 - - 1.4 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC -V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 - 0.3 V
VCC = 2.0 V - - 0.6 - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3VCC - 0.3VCCV
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting
[1] Typical values are measured at Tamb = 25°C.
VOH HIGH-level output voltage VI = VIH or VIL
lO = −100 μA; VCC = 1.2V - 1.2 - - - V
lO = −100 μA; VCC = 2.0V 1.8 2.0 - 1.8 - V
lO = −100 μA; VCC = 2.7V 2.5 2.7 - 2.5 - V
lO = −100 μA; VCC = 3.0V 2.8 3.0 - 2.8 - V
lO = −100 μA; VCC = 4.5V 4.3 4.5 - 4.3 - V
lO = −6 mA; VCC = 3.0V 2.4 2.82 - 2.2 - V
lO = −12 mA; VCC = 4.5V 3.6 4.2 - 3.5 - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 μA; VCC = 1.2V - 0 - - - V
IO = 100 μA; VCC = 2.0V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 2.7V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 3.0V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 4.5V - 0 0.2 - 0.2 V
IO = 6 mA; VCC = 3.0V - 0.25 0.40 - 0.50 V
IO = 12 mA; VCC = 4.5V - 0.35 0.55 - 0.65 V input leakage current VI =VCCor GND;
VCC= 5.5V - 1.0 - 1.0 μA
ICC supply current VI = VCC or GND; IO = 0A;
VCC= 5.5V - 20.0 - 160 μA
ΔICC additional supply current per input; VI = VCC − 0.6V;
VCC= 2.7Vto 3.6V - 500 - 850 μA input capacitance - 3.5 - - - pF
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting
10. Dynamic characteristics
[1] All typical values are measured at Tamb =25°C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3V).
[4] CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where: = input frequency in MHz, fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in V= number of inputs switching
Σ(CL× VCC2×fo)= sum of the outputs.
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure8.
tpd propagation delay Anto Yn; see Figure6 [2]
VCC = 1.2 V - 75 - - - ns
VCC = 2.0 V - 26 44 - 55 ns
VCC = 2.7 V - 19 31 - 39 ns
VCC = 3.0 V to 3.6 V; CL =15pF [3] -12 - - - ns
VCC = 3.0 V to 3.6 V [3] - 15 26 - 32 ns
VCC = 4.5 V to 5.5 V - - 17 - 22 ns
E3,Ento Yn; see Figure 6 and
Figure7
VCC = 1.2 V - 75 - - - ns
VCC = 2.0 V - 26 43 - 53 ns
VCC = 2.7 V - 19 30 - 38 ns
VCC = 3.0 V to 3.6 V; CL =15pF [3] -14 - - - ns
VCC = 3.0 V to 3.6 V [3] - 15 25 - 31 ns
VCC = 4.5 V to 5.5 V - - 19 - 24 ns
CPD power dissipation
capacitance=50 pF; fi = 1 MHz;= GNDto VCC
[4] -45 - - - pF
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting
11. Waveforms
Table 8. Measurement points
< 2.7 V 0.5VCC 0.5VCC
2.7 V to 3.6V 1.5 V 1.5 V
≥ 4.5 V 0.5VCC 0.5VCC
NXP Semiconductors 74L V138
3-to-8 line decoder/demultiplexer; inverting
Table 9. Test data
< 2.7 V VCC ≤ 2.5 ns
2.7 V to 3.6V 2.7 V ≤ 2.5 ns
≥ 4.5 V VCC ≤ 2.5 ns

Partno	Mfg	Dc	Qty	Available	Descript
74LV138PW		N/a	25000	avai	3-to-8 line decoder/demultplexer; inverting
74LV138PW	NXP	N/a	1495	avai	3-to-8 line decoder/demultplexer; inverting