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74LCX573MTCFSC ?N/a134avaiLow Voltage Octal Latch with 5V Tolerant Input and Outputs
74LCX573MTCXFAIRCN/a763avaiLow Voltage Octal Latch with 5V Tolerant Input and Outputs
74LCX573WMXFAIRCHILN/a13000avaiLow Voltage Octal Latch with 5V Tolerant Input and Outputs
74LCX573WMXFAIRCN/a14000avaiLow Voltage Octal Latch with 5V Tolerant Input and Outputs
74LCX573WMXFAIRCHILDN/a1535avaiLow Voltage Octal Latch with 5V Tolerant Input and Outputs


74LCX573WMX ,Low Voltage Octal Latch with 5V Tolerant Input and OutputsFeaturesThe LCX573 is a high-speed octal latch with buffered com-

74LCX573MTC-74LCX573MTCX-74LCX573WMX
Low Voltage Octal Latch with 5V Tolerant Input and Outputs
74LCX573 Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs March 1995 Revised March 2001 74LCX573 Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs General Description Features The LCX573 is a high-speed octal latch with buffered com-5V tolerant inputs and outputs mon Latch Enable (LE) and buffered common Output2.3V–3.6V V specifications provided CC Enable (OE) inputs. 7.0 ns t max (V = 3.3V), 10 μA I max PD CC CC The LCX573 is functionally identical to the LCX373 but has Power down high impedance inputs and outputs inputs and outputs on opposite sides. Supports live insertion/withdrawal (Note 1) The LCX573 is designed for low voltage (3.3V or 2.5V) applications with capability of interfacing to a 5V signal±24 mA output drive (V = 3.0V) CC environment. The LCX573 is fabricated with an advanced Implements patented noise/EMI reduction circuitry CMOS technology to achieve high speed operation while Latch-up performance exceeds 500 mA maintaining CMOS low power dissipation. ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up resistor: the minimum value or the CC resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX573WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LCX573SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX573MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LCX573MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Description D –D Data Inputs 0 7 LE Latch Enable Input OE 3-STATE Output Enable Input O –O 3-STATE Latch Outputs 0 7 © 2001 DS012405
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