74LCX27 ,Low Voltage Triple 3-Input NOR Gate with 5V Tolerant InputsElectrical CharacteristicsV T = −40°C to +85°CCC ASymbol Parameter Conditions Units(V) Min MaxV HIG ..
74LCX27 ,Low Voltage Triple 3-Input NOR Gate with 5V Tolerant InputsFeaturesThe LCX27 contains three 3-input NOR gates. The inputs
74LCX27
Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
74LCX27 Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs February 2001 Revised February 2001 74LCX27 Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs General Description Features The LCX27 contains three 3-input NOR gates. The inputs5V tolerant inputs tolerate voltages up to 7V allowing the interface of 5V sys-2.3V–3.6V V specifications provided CC tems to 3V systems. 4.9 ns t max (V = 3.3V), 10 μA I max PD CC CC The 74LCX27 is fabricated with advanced CMOS technol- Power down high impedance inputs and outputs ogy to achieve high speed operation while maintaining CMOS low power dissipation.±24 mA output drive (V = 3.0V) CC Implements patented noise/EMI reduction circuitry Latch-up performance exceeds 500 mA ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Order Number Package Number Package Description 74LCX27M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX27SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX27MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Truth Table O = A + B + C Pin Names Description n n n n A , B , C Inputs Inputs Output n n n O Outputs n A B C O n n n n HX X L XHX L XX H L LL L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 2001 DS500454
