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74LCX157MTRSTN/a2200avaiLOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS
74LCX157TTRSTN/a11avaiLOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS


74LCX157MTR ,LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTSAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LCX157MX ,Low Voltage Quad 2-Input Multiplexer with 5V Tolerant InputsFeaturesThe LCX157 is a high-speed quad 2-input multiplexer. Four

74LCX157MTR-74LCX157TTR
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS
1/9September 2001 5V TOLERANT INPUTS HIGH SPEED :
tPD = 6.0ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: PLH ≅ t PHL OPERATING VOLTAGE RANGE:CC (OPR) = 2.0V to 3.6V (1.5V Data
Retention) PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 157 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION

The 74LCX157 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for inputs.
It consists of four 2-input digital multiplexer with
common select and strobe inputs. It is a
non-inverting multiplexer. When the STROBE
input is held high selection of data is inhibited and
all the outputs become low. The SELECT
decoding determines whether the A or B inputs
get routed to their corresponding Y outputs.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX157

LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LCX157
2/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE

X : Don’t Care
74LCX157
3/9
LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) IO absolute maximum rating must be observed
2) VO < GND
RECOMMENDED OPERATING CONDITIONS

1) Truth Table guaranteed: 1.5V to 3.6V
2) VIN from 0.8V to 2V at VCC = 3.0V
74LCX157
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DC SPECIFICATIONS
DYNAMIC SWITCHING CHARACTERISTICS

1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
74LCX157
5/9
AC ELECTRICAL CHARACTERISTICS

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per
channel)
TEST CIRCUIT

CL = 50 pF or equivalent (includes jig and probe capacitance)
RL = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74LCX157
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WAVEFORM 1 : PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle)
WAVEFORM 2 : PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty

cycle)
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