74LCX07MTR ,LOW VOLTAGE HEX BUFFER (OPEN DRAIN) WITH 5V TOLERANT INPUTS74LCX07LOW VOLTAGE CMOS HEX BUFFER (OPEN DRAIN)WITH 5V TOLERANT INPUTS ■ 5V TOLERANT INPUTS■ HIGH ..
74LCX07MTR ,LOW VOLTAGE HEX BUFFER (OPEN DRAIN) WITH 5V TOLERANT INPUTSAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LCX07MTR ,LOW VOLTAGE HEX BUFFER (OPEN DRAIN) WITH 5V TOLERANT INPUTSapplications. It can be interfaced to 5Vsignal environment for inputs.PIN CONNECTION AND IEC LOGIC ..
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74LCX07MTR-74LCX07TTR
LOW VOLTAGE HEX BUFFER (OPEN DRAIN) WITH 5V TOLERANT INPUTS
1/8September 2001 5V TOLERANT INPUTS HIGH SPEED :PD = 5.2ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA OPERATING VOLTAGE RANGE:
VCC(OPR) = 2.0V to 3.6V (1.5V Data
Retention) PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 07 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTIONThe 74LCX07 is a low voltage CMOS OPEN
DRAIN HEX BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C2 MOS
technology. It is ideal for low power and high
speed 3.3V applications. It can be interfaced to 5V
signal environment for inputs.
The internal circuit is composed of 2 stages
including buffer output, which provides high noise
immunity and stable output.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX07LOW VOLTAGE CMOS HEX BUFFER (OPEN DRAIN)
WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LCX072/8
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION TRUTH TABLE Z : High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) IO absolute maximum rating must be observed
2) VO < GND
74LCX073/8
RECOMMENDED OPERATING CONDITIONS 1) Truth Table guaranteed: 1.5V to 3.6V
2) VIN from 0.8V to 2V at VCC = 3.0V
DC SPECIFICATIONS
DYNAMIC SWITCHING CHARACTERISTICS 1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
74LCX074/8
AC ELECTRICAL CHARACTERISTICS 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per gate)
TEST CIRCUIT CL = 50 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74LCX075/8
WAVEFORM : PROPAGATION DELAY (f=1MHz; 50% duty cycle)
