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74HCU04DNXPN/a85520avaiHex inverter
74HCU04DBN/a18000avaiHex inverter
74HCU04NN/a20avaiHex inverter
74HCU04PWNXPN/a32260avai74HCU04; Hex inverter


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74HCU04PW ,74HCU04; Hex inverterFEATURES• Output capability: standard• I category: SSICC
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74HCU04D-74HCU04DB-74HCU04N-74HCU04PW
Hex inverter
1. General description
The 74HCU04 is a hex unbuffered inverter. Inputs include clamp diodes. This enables the
use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Complies with JEDEC standard JESD7A Balanced propagation delays ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from 40 Cto +125 C
3. Ordering information

74HCU04
Hex inverter
Rev. 6 — 27 December 2012 Product data sheet
Table 1. Ordering information

74HCU04N 40 C to +125C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCU04D 40 C to +125C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74HCU04DB 40 C to +125C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
74HCU04PW 40 C to +125C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width4.4 mm
SOT402-1
74HCU04BQ 40 C to +125C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 14 terminals; body 2.53 0.85 mm
SOT762-1
NXP Semiconductors 74HCU04
Hex inverter
4. Functional diagram

5. Pinning information

NXP Semiconductors 74HCU04
Hex inverter
5.1 Pin description

6. Functional description

7. Limiting values

Table 2. Pin description
1 data input 2 data output 3 data input 4 data output 5 data input 6 data output
GND 7 ground (0 V) 8 data output 9 data input 10 data output 11 data input 12 data output 13 data input
VCC 14 supply voltage
Table 3. Function table

H = HIGH voltage level; L = LOW voltage level
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VCC supply voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V orVI >VCC +0.5V [1]- 20 mA
IOK output clamping current VO< 0.5 V orVO >VCC +0.5V [1]- 50 mA output current 0.5 V < VO < VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation [2]
DIP14 package - 750 mW
SO14, (T)SSOP14 and
DHVQFN14 packages 500 mW
NXP Semiconductors 74HCU04
Hex inverter

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60C.
8. Recommended operating conditions

9. Static characteristics

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 6.0 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 C
Table 6. Static characteristics

Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level
input voltage
VCC = 2.0 V 1.7 1.4 - 1.7 - 1.7 - V
VCC = 3.0 V 3.6 2.6 - 3.6 - 3.6 - V
VCC = 5.5 V 4.8 3.4 - 4.8 - 4.8 - V
VIL LOW-level
input voltage
VCC = 2.0 V - 0.6 0.3 - 0.3 - 0.3 V
VCC = 3.0 V - 1.9 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - 2.6 1.2 - 1.2 - 1.2 V
VOH HIGH-level
output voltage = VIH or VIL = 20 A; VCC= 2.0V 1.8 2.0 - 1.8 - 1.8 - V = 20 A; VCC= 4.5V 4.0 4.5 - 4.0 - 4.0 - V = 4.0 mA; VCC= 4.5V 3.98 4.32- 3.84 - 3.7 - V = 20 A; VCC= 6.0V 5.5 6.0 - 5.5 - 5.5 - V = 5.2 mA; VCC= 6.0V 5.48 5.81- 5.34 - 5.2 - V
VOL LOW-level
output voltage = VIH or VIL = 20 A; VCC= 2.0V - 0 0.2 - 0.2 - 0.2 V = 20 A; VCC= 4.5V - 0 0.5 - 0.5 - 0.5 V = 4.0 mA; VCC= 4.5V - 0.15 0.26- 0.33 - 0.4 V = 20 A; VCC= 6.0V - 0 0.5 - 0.5 - 0.5 V = 5.2 mA; VCC= 6.0V - 0.16 0.26- 0.33 - 0.4 V
NXP Semiconductors 74HCU04
Hex inverter
10. Dynamic characteristics

[1] tpd is the same as tPHL, tPLH.
[2] tt is the same as tTHL, tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N+ (CL VCC2fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2 fo) = sum of outputs. input leakage
current =VCCor GND;
VCC =6.0V 0.1 - 1.0 - 1.0 A
ICC supply current VI =VCCor GND; IO =0A;
VCC =6.0V
--2 - 20 - 20 A input
capacitance
-3.5- - - - - pF
Table 6. Static characteristics …continued

Voltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristics

Voltages are referenced to GND (ground=0 V); For test circuit see Figure7.
tpd propagation delay nA to nY; see Figure6 [1]
VCC = 2.0 V; CL = 50 pF 19 70 90 105 ns
VCC = 4.5 V; CL = 50 pF 7 14 18 21 ns
VCC = 5.0 V; CL = 15 pF 5 - - - ns
VCC = 6.0 V; CL = 50 pF 6 12 15 18 ns transition time see Figure6 [2]
VCC = 2.0 V; CL = 50 pF 19 75 95 110 ns
VCC = 4.5 V; CL = 50 pF 7 15 19 22 ns
VCC = 6.0 V; CL = 50 pF 6 13 16 19 ns
CPD power dissipation
capacitance
per inverter; VI =GNDto VCC [3] 10 - pF
NXP Semiconductors 74HCU04
Hex inverter
11. Waveforms

12. Typical transfer characteristics

NXP Semiconductors 74HCU04
Hex inverter

NXP Semiconductors 74HCU04
Hex inverter
13. Application information

Some applications are: Linear amplifier (see Figure 13) Crystal oscillator design (see Figure 14) Astable multivibrator (see Figure 15)
Remark: All values given are typical unless otherwise specified.

Table 8. External components for resonator (f<1 MHz)

All values given are typical and must be used as an initial set-up. kHz to 15.9 kHz 22 M 220 k 56 pF 20 pF kHz to 24.9 kHz 22 M 220 k 56 pF 10 pF kHz to 54.9 kHz 22 M 100 k 56 pF 10 pF kHz to 129.9 kHz 22 M 100 k 47 pF 5 pF
130 kHz to 199.9 kHz 22 M 47 k 47 pF 5 pF
200 kHz to 349.9 kHz 10 M 47 k 47 pF 5 pF
350 kHz to 600 kHz 10 M 47 k 47 pF 5 pF
NXP Semiconductors 74HCU04
Hex inverter

Table 9. Optimum value for R2
kHz 2.0 k minimum required ICC
8.0 k minimum influence due to change in VCC kHz 1.0 k minimum required ICC
4.7 k minimum influence by VCC
10 kHz 0.5 k minimum required ICC
2.0 k minimum influence by VCC
14 kHz 0.5 k minimum required ICC
1.0 k minimum influence by VCC
>14 kHz - replace R2 by C3 with a typical value of 35pF
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