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74HC58D
74HC58; Dual AND-OR gate
Philips Semiconductors Product specification
Dual AND-OR gate 74HC58
FEATURES Output capability: standard ICC category: SSI
GENERAL DESCRIPTIONThe 74HC58 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard no. 7A.
The “58” provides two sections of AND-OR gates. One section contains a 2-wide, 3-input (1A to 1F) AND-OR gate and
the second section contains a 2-wide, 2-input (2A to 2D) AND-OR gate.
QUICK REFERENCE DATAGND = 0 V; Tamb = 15 °C; tr = tf = 6 ns
Notes CPD is used to determine the dynamic power dissipation (PDin μW): = CPD× VCC2×fi+∑ (CL× VCC2×fo) where: = input frequency in MHz = output frequency in MHz= output load capacitance in pF
VCC= supply voltage in V (CL× VCC2×fo) = sum of outputs For HC the condition is VI= GND to VCC
ORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.
Philips Semiconductors Product specification
Dual AND-OR gate 74HC58
PIN DESCRIPTION
Philips Semiconductors Product specification
Dual AND-OR gate 74HC58
FUNCTION TABLE(1)
Note H = HIGH voltage level
L = LOW voltage level
X = don’t care
Philips Semiconductors Product specification
Dual AND-OR gate 74HC58
DC CHARACTERISTICS FOR 74HCFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: SSI
AC CHARACTERISTICS FOR 74HCGND = 0 V; tr = tf = 6 ns; CL = 50 pF
AC WAVEFORMS
PACKAGE OUTLINESSee “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
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