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74HC4053D from PHIPLIPS, Philips 106pcs , SOP,Triple 2-channel analog multiplexer/demultiplexer
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74HC4053D PHIPLIPS N/a 106
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74HC4053D from PHIL, Philips 150pcs , SOP3.9,Triple 2-channel analog multiplexer/demultiplexer

FEATURES The 74HC/HCT4053 are triple 2-channel analogmultiplexers/demultiplexers with a common enable input• Low “ON” resistance:(E). Each multiplexer/demultiplexer has two independent80 Ω (typ.) at V - V = 4.5 VCC EEinputs/outputs (nY and nY ), a common input/output (nZ)0 170 Ω (typ.) at V - V = 6.0 VCC EEand three digital select inputs (S to S ).1 360 Ω (typ.) at V - V = 9.0 VCC EEWith E LOW, one of the two switches is selected (low• Logic level translation:impedance ON-state) by S to S . With E HIGH, all1 3to enable 5 V logic to communicateswitches are in the high impedance OFF-state,with ± 5 V analog signalsindependent of S to S .1 3• Typical “break before make” built inV and GND are the supply voltage pins for the digitalCC• Output capability: non-standardcontrol inputs (S , to S , and E). The V to GND ranges1 3 CC• I category: MSICCare 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. Theanalog inputs/outputs (nY and nY , and nZ) can swing0 1between V as a positive limit and V as a negative limit.CC EE 74HC4053; 74HCT4053Triple 2-channel analog multiplexer/demultiplexerRev. 8 — 19 July 2012 Product data sheet1. GENERAL DESCRIPTIONV - V may not exceed 10.0 V.CC EEThe 74HC/HCT4053 are high-speed Si-gate CMOSFor operation as a digital multiplexer/demultiplexer, V isEEdevices and are pin compatible with the “4053” of theconnected to GND (typically ground).“4000B” series. They are specified in compliance withJEDEC standard no. 7A.QUICK REFERENCE DATAV = GND = 0 V; T =25°C; t =t = 6 nsEE amb r fTYPICALSYMBOL PARAMETER CONDITIONS UNITHC HCTt / t turn “ON” time C = 15 pF; R =1 kΩ; V =5 VPZH PZL L L CCE to V 17 23 nsOSS to V 21 21 nsn OSt / t turn “OFF” timePHZ PLZE to V 18 20 nsOSS to V 17 19 nsn OSC input capacitance 3.5 3.5 pFIC power dissipation capacitance per switch notes 1 and 2 36 36 pFPDC max. switch capacitanceSindependent (Y) 5 5 pFcommon (Z) 8 8 pFNotes1. C is used to determine the dynamic power dissipation (P in μW):PD D2 2P =C × V × f +∑ {(C +C ) × V × f } where:D PD CC i L S CC of = input frequency in MHz; f = output frequency in MHzi o2∑ {(C +C ) × V × f } = sum of outputsL S CC oC = output load capacitance in pF; C = max. switch capacitance in pFL SV = supply voltage in VCC2. For HC the condition is V = GND to VI CCFor HCT the condition is V = GND to V - 1.5 VI CCDecember 1990 2Philips Semiconductors Product specificationTriple 2-channel analog74HC/HCT4053multiplexer/demultiplexerORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.PIN DESCRIPTIONPIN NO. SYMBOL NAME AND FUNCTION2, 1 2Y to, 2Y independent inputs/outputs0 15, 3 3Y to, 3Y independent inputs/outputs0 16 E enable input (active LOW)7V negative supply voltageEE8 GND ground (0 V)11, 10, 9 S to S select inputs1 312, 13 1Y , 1Y independent inputs/outputs0 114, 15, 4 1Z to 3Z common inputs/outputs16 V positive supply voltageCCFig.1 FEATURES The 74HC/HCT4053 are triple 2-channel analogmultiplexers/demultiplexers with a common enable input• Low “ON” resistance:(E). Each multiplexer/demultiplexer has two independent80 Ω (typ.) at V - V = 4.5 VCC EEinputs/outputs (nY and nY ), a common input/output (nZ)0 170 Ω (typ.) at V - V = 6.0 VCC EEand three digital select inputs (S to S ).1 360 Ω (typ.) at V - V = 9.0 VCC EEWith E LOW, one of the two switches is selected (low• Logic level translation:impedance ON-state) by S to S . With E HIGH, all1 3to enable 5 V logic to communicateswitches are in the high impedance OFF-state,with ± 5 V analog signalsindependent of S to S .1 3• Typical “break before make” built inV and GND are the supply voltage pins for the digitalCC• Output capability: non-standardcontrol inputs (S , to S , and E). The V to GND ranges1 3 CC• I category: MSICCare 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. Theanalog inputs/outputs (nY and nY , and nZ) can swing0 1between V as a positive limit and V as a negative limit.CC EEFEATURES The 74HC/HCT4053 are triple 2-channel analogmultiplexers/demultiplexers with a common enable input• Low “ON” resistance:(E). Each multiplexer/demultiplexer has two independent80 Ω (typ.) at V - V = 4.5 VCC EEinputs/outputs (nY and nY ), a common input/output (nZ)0 170 Ω (typ.) at V - V = 6.0 VCC EEand three digital select inputs (S to S ).1 360 Ω (typ.) at V - V = 9.0 VCC EEWith E LOW, one of the two switches is selected (low• Logic level translation:impedance ON-state) by S to S . With E HIGH, all1 3to enable 5 V logic to communicateswitches are in the high impedance OFF-state,with ± 5 V analog signalsindependent of S to S .1 3• Typical “break before make” built inV and GND are the supply voltage pins for the digitalCC• Output capability: non-standardcontrol inputs (S , to S , and E). The V to GND ranges1 3 CC• I category: MSICCare 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. Theanalog inputs/outputs (nY and nY , and nZ) can swing0 1between V as a positive limit and V as a negative limit.CC EEGeneral descriptionThe 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3.V and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). CCThe V to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for CC74HCT4053. The analog inputs/outputs (nY0 to nY1, and nZ) can swing between V as CCa positive limit and V as a negative limit. V V may not exceed 10.0 V.EE CC EEFor operation as a digital multiplexer/demultiplexer, V is connected to GND (typically EEground).2. General descriptionThe 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3.V and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). CCThe V to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for CC74HCT4053. The analog inputs/outputs (nY0 to nY1, and nZ) can swing between V as CCa positive limit and V as a negative limit. V V may not exceed 10.0 V.EE CC EEFor operation as a digital multiplexer/demultiplexer, V is connected to GND (typically EEground).2. INTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines74HC/HCT4053Triple 2-channel analogmultiplexer/demultiplexerDecember 1990Product specificationFile under Integrated Circuits, IC06Philips Semiconductors Product specificationTriple 2-channel analog74HC/HCT4053multiplexer/demultiplexerGeneral descriptionThe 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3.V and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). CCThe V to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for CC74HCT4053. The analog inputs/outputs (nY0 to nY1, and nZ) can swing between V as CCa positive limit and V as a negative limit. V V may not exceed 10.0 V.EE CC EEFor operation as a digital multiplexer/demultiplexer, V is connected to GND (typically EEground).2. Features and benefits Wide analog input voltage range from 5 V to +5 V Low ON resistance: 80 (typical) at V V =4.5 VCC EE 70 (typical) at V V =6.0 VCC EE 60 (typical) at V V =9.0 VCC EE Logic level translation: to enable 5 V logic to communicate with 5 V analog signals Typical ‘break before make’ built-in ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from 40Cto +85C and 40Cto +125C74HC4053; 74HCT4053NXP SemiconductorsTriple 2-channel analog multiplexer/demultiplexer3. FEATURES The 74HC/HCT4053 are triple 2-channel analogmultiplexers/demultiplexers with a common enable input• Low “ON” resistance:(E). Each multiplexer/demultiplexer has two independent80 Ω (typ.) at V - V = 4.5 VCC EEinputs/outputs (nY and nY ), a common input/output (nZ)0 170 Ω (typ.) at V - V = 6.0 VCC EEand three digital select inputs (S to S ).1 360 Ω (typ.) at V - V = 9.0 VCC EEWith E LOW, one of the two switches is selected (low• Logic level translation:impedance ON-state) by S to S . With E HIGH, all1 3to enable 5 V logic to communicateswitches are in the high impedance OFF-state,with ± 5 V analog signalsindependent of S to S .1 3• Typical “break before make” built inV and GND are the supply voltage pins for the digitalCC• Output capability: non-standardcontrol inputs (S , to S , and E). The V to GND ranges1 3 CC• I category: MSICCare 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. Theanalog inputs/outputs (nY and nY , and nZ) can swing0 1between V as a positive limit and V as a negative limit.CC EEGENERAL DESCRIPTIONV - V may not exceed 10.0 V.CC EEThe 74HC/HCT4053 are high-speed Si-gate CMOSFor operation as a digital multiplexer/demultiplexer, V isEEdevices and are pin compatible with the “4053” of theconnected to GND (typically ground).“4000B” series. They are specified in compliance withJEDEC standard no. 7A.QUICK REFERENCE DATAV = GND = 0 V; T =25°C; t =t = 6 nsEE amb r fTYPICALSYMBOL PARAMETER CONDITIONS UNITHC HCTt / t turn “ON” time C = 15 pF; R =1 kΩ; V =5 VPZH PZL L L CCE to V 17 23 nsOSS to V 21 21 nsn OSt / t turn “OFF” timePHZ PLZE to V 18 20 nsOSS to V 17 19 nsn OSC input capacitance 3.5 3.5 pFIC power dissipation capacitance per switch notes 1 and 2 36 36 pFPDC max. switch capacitanceSindependent (Y) 5 5 pFcommon (Z) 8 8 pFNotes1. C is used to determine the dynamic power dissipation (P in μW):PD D2 2P =C × V × f +∑ {(C +C ) × V × f } where:D PD CC i L S CC of = input frequency in MHz; f = output frequency in MHzi o2∑ {(C +C ) × V × f } = sum of outputsL S CC oC = output load capacitance in pF; C = max. switch capacitance in pFL SV = supply voltage in VCC2. For HC the condition is V = GND to VI CCFor HCT the condition is V = GND to V - 1.5 VI CCDecember 1990 2Philips Semiconductors Product specificationTriple 2-channel analog74HC/HCT4053multiplexer/demultiplexerORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.PIN DESCRIPTIONPIN NO. SYMBOL NAME AND FUNCTION2, 1 2Y to, 2Y independent inputs/outputs0 15, 3 3Y to, 3Y independent inputs/outputs0 16 E enable input (active LOW)7V negative supply voltageEE8 GND ground (0 V)11, 10, 9 S to S select inputs1 312, 13 1Y , 1Y independent inputs/outputs0 114, 15, 4 1Z to 3Z common inputs/outputs16 V positive supply voltageCCFig.1 INTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines74HC/HCT4053Triple 2-channel analogmultiplexer/demultiplexerDecember 1990Product specificationFile under Integrated Circuits, IC06Philips Semiconductors Product specificationTriple 2-channel analog74HC/HCT4053multiplexer/demultiplexer

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