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74HC273PW from PHILIPS  , Philips 57290pcs,74HC/HCT273; Octal D-type flip-flop with reset; positive-edge trigger
Partno Mfg Dc Qty Available
74HC273PW PHILIPS   N/a 57290
74HC273PW from PHILIPS, Philips 1951pcs , TSSOP-20,74HC/HCT273; Octal D-type flip-flop with reset; positive-edge trigger
74HC273PW from NXP, NXP Semiconductors 30000pcs , TSSOP,74HC/HCT273; Octal D-type flip-flop with reset; positive-edge trigger
74HC273PW from PHI, Philips 4500pcs , TSSOP,74HC/HCT273; Octal D-type flip-flop with reset; positive-edge trigger
74HC273PW 3501pcs , SOP,74HC/HCT273; Octal D-type flip-flop with reset; positive-edge trigger

applications where the true outputonly is required and the clock and master reset arecommon to all storage elements.QUICK REFERENCE DATAGND = 0 V; T =25 °C; t =t = 6 nsamb r fTYPICALSYMBOL PARAMETER CONDITIONS UNITHC HCTt t propagation delay C = 15 pF; V =5 VPHL/ PLH L CCCP to Q 15 15 nsnMR to Q 15 20 nsnf maximum clock frequency 66 36 MHzmaxC input capacitance 3.5 3.5 pFIC power dissipation capacitance per flip-flop notes 1 and 2 20 23 pFPDNotes1. C is used to determine the dynamic power dissipation (P in μW):PD D2 2P =C × V × f + ∑ (C × V × f ) where:D PD CC i L CC of = input frequency in MHzif = output frequency in MHzo2∑ (C × V × f ) = sum of outputsL CC oC = output load capacitance in pFLV = supply voltage in VCC2. For HC the condition is V = GND to VI CCFor HCT the condition is V = GND to V - 1.5 VI CCORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.September 1993 2Philips Semiconductors Product specificationOctal D-type flip-flop with reset;74HC/HCT273positive-edge triggerPIN DESCRIPTIONPIN NO. SYMBOL NAME AND FUNCTION1 MR master reset input (active LOW)2, 5, 6, 9, 12, 15, 16, 19 Q to Q flip-flop outputs0 73, 4, 7, 8, 13, 14, 17, 18 D to D data inputs0 710 GND ground (0 V)11 CP clock input (LOW-to-HIGH, edge-triggered)20 V positive supply voltageCCFig.1 GENERAL DESCRIPTION• Ideal buffer for MOS microprocessor or memory The 74HC/HCT273 are high-speed Si-gate CMOS devicesand are pin compatible with low power Schottky TTL• Common clock and master reset(LSTTL). They are specified in compliance with JEDEC• Eight positive edge-triggered D-type flip-flopsstandard no. 7A.• See “377” for clock enable versionThe 74HC/HCT273 have eight edge-triggered, D-type• See “373” for transparent latch versionflip-flops with individual D inputs and Q outputs. The• See “374” for 3-state version common clock (CP) and master reset (MR) inputs load andreset (clear) all flip-flops simultaneously.• Output capability; standardThe state of each D input, one set-up time before the• I category: MSICCLOW-to-HIGH clock transition, is transferred to thecorresponding output (Q ) of the flip-flop.nAll outputs will be forced LOW independently of clock ordata inputs by a LOW voltage level on the MR input.The device is useful for Features and benefits Input levels: For 74HC273: CMOS level For 74HCT273: TTL level Common clock and master reset Eight positive edge-triggered D-type flip-flops Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V. Multiple package options Specified from 40Cto+85C and from 40Cto+125C3. Ordering information Table 1. Ordering informationType number PackageTemperature range Name Description Version74HC273N40 C to +125 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-174HCT273N74HC273D40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-174HCT273D74HC273DB40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width SOT339-15.3 mm74HCT273DB74HC273; 74HCT273NXP SemiconductorsOctal D-type flip-flop with reset; positive-edge triggerTable 1. Ordering information …continuedType number PackageTemperature range Name Description Version74HC273PW40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body SOT360-1width 4.4 mm74HCT273PW74HC273BQ40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin SOT764-1quad flat package; no leads; 20 terminals; 74HCT273BQbody 2.5 4.5 0.85 mm4. Functional diagram 11CP C11RMR113 2D0 1D Q0D0 Q0 CP3 23 2D1 Q1 D0 Q04 54 5 D1Q14 5D2 Q2D1 Q17 67 67 6D3 Q3 D2 Q2FF1D2 Q28 9D4 TO Q4 8 98 913 12 D3 Q3D3 Q3FF8D5 Q513 1213 1214 15D4Q4D4 Q4D6 Q617 16 14 1514 15D5 Q5D7 Q7D5 Q518 1917 16D6 Q617 16MRD6 Q618 191D7 Q7CP 18 19MR11 D7 Q7001aae055 1 mna763 mna764Fig 1. Functional diagram Fig 2. Logic symbol Fig 3. IEC logic symbol74HC_HCT273 All information provided in this document is subject to legal disclaimers. NXP B.V. 2013. All rights reserved.Product data sheet Rev. 4 — 10 June 2013 2 of 2174HC273; 74HCT273NXP SemiconductorsOctal D-type flip-flop with reset; positive-edge trigger D0 D1 D2 D3D Q D Q D Q D QCP CP CP CPFF1 FF2 FF3 FF4R R R RD D D DCPMRQ0 Q1 Q2 Q3D4 D5 D6 D7D Q D Q D Q D QCP CP CP CPFF5 FF6 FF7 FF8R R R RD D D DQ4 Q5 Q6 Q7001aae056Fig 4. INTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines74HC/HCT273Octal D-type flip-flop with reset;positive-edge triggerSeptember 1993Product specificationFile under Integrated Circuits, IC06Philips Semiconductors Product specificationOctal D-type flip-flop with reset;74HC/HCT273positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines74HC/HCT273Octal D-type flip-flop with reset;positive-edge triggerSeptember 1993Product specificationFile under Integrated Circuits, IC06Philips Semiconductors Product specificationOctal D-type flip-flop with reset;74HC/HCT273positive-edge trigger
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74HC273PW ,74HC/HCT273; Octal D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
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