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74HC273BQPHILIPSN/a2avaiOctal D-type flip-flop with reset; positive-edge trigger
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74HC273BQ-74HC273D-74HC273N-74HC273PW-74HCT273BQ-74HCT273D-74HCT273DB-74HCT273PW
74HC/HCT273; Octal D-type flip-flop with reset; positive-edge trigger

Philips Semiconductors Product specification
Octal D-type flip-flop with reset;
positive-edge trigger 74HC/HCT273
FEATURES
Ideal buffer for MOS microprocessor or memory Common clock and master reset Eight positive edge-triggered D-type flip-flops See “377” for clock enable version See “373” for transparent latch version See “374” for 3-state version Output capability; standard ICC category: MSI
GENERAL DESCRIPTION

The 74HC/HCT273 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT273 have eight edge-triggered, D-type
flip-flops with individual D inputs and Q outputs. The
common clock (CP) and master reset (MR) inputs load and
reset (clear) all flip-flops simultaneously.
The state of each D input, one set-up time before the
LOW-to-HIGH clock transition, is transferred to the
corresponding output (Qn) of the flip-flop.
All outputs will be forced LOW independently of clock or
data inputs by a LOW voltage level on the MR input.
The device is useful for applications where the true output
only is required and the clock and master reset are
common to all storage elements.
QUICK REFERENCE DATA

GND= 0 V; Tamb =25 °C; tr =tf= 6 ns
Notes
CPD is used to determine the dynamic power dissipation (PD in μW): =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:= input frequency in MHz= output frequency in MHz
∑ (CL × VCC2 × fo)= sum of outputs= output load capacitance in pF
VCC= supply voltage in V For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC − 1.5 V
ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.
Philips Semiconductors Product specification
Octal D-type flip-flop with reset;
positive-edge trigger 74HC/HCT273
PIN DESCRIPTION
Philips Semiconductors Product specification
Octal D-type flip-flop with reset;
positive-edge trigger 74HC/HCT273
FUNCTION TABLE
Note
H= HIGH voltage level= HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition= LOW voltage level= LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition= LOW-to-HIGH transition= don’t care
Philips Semiconductors Product specification
Octal D-type flip-flop with reset;
positive-edge trigger 74HC/HCT273
DC CHARACTERISTICS FOR 74HC

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC

GND= 0 V; tr =tf= 6 ns; CL= 50 pF
Philips Semiconductors Product specification
Octal D-type flip-flop with reset;
positive-edge trigger 74HC/HCT273
DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types

The value of additional quiescent supply current (ΔICC) for a unit load of 1 is given in the family specifications.
To determine ΔICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT

GND= 0 V; tr =tf= 6 ns; CL= 50 pF
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