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74F843SPCNSCN/a10avai9-Bit Transparent Latch
74F843SPCNSN/a64avai9-Bit Transparent Latch


74F843SPC ,9-Bit Transparent LatchFeaturesThe 74F843 bus interface latch is designed to eliminate the 3-STATE outputextra packages r ..
74F843SPC ,9-Bit Transparent LatchFunctional Description Function TableThe 74F843 consists of nine D-type latches with 3-STATEInputs ..
74F845SC ,8-Bit Transparent LatchFeaturesThe 74F845 bus interface latch is designed to eliminate the 3-STATE outputsextra packages ..
74F845SPC ,8-Bit Transparent LatchFunctional Description Function TableThe 74F845 consists of eight D-type latches with 3-STATEInputs ..
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74LS02 ,Quad 2-Input NOR GateGeneral DescriptionThis device contains four independent gates each of whichperforms the logic NOR ..
74LS03 ,Quad 2-Input NAND Gates with Open-Collector OutputsGeneral Description Pull-Up Resistor EquationsThis device contains four independent gates each of w ..
74LS04 ,Hex Inverting GatesGeneral DescriptionThis device contains six independent gates each of whichperforms the logic INVER ..
74LS05 ,Hex Inverters with Open-Collector OutputsHEX INVERTER DESCRIPTION The T54LS05/T74LS05 is a high speed HEX IN. VERTER fabricated in LOW PO ..
74LS08 ,Quad 2-Input AND GatesDM74LS08 Quad 2-Input AND GatesAugust 1986Revised March 2000DM74LS08Quad 2-Input AND Gates
74LS09 ,Quad 2-Input AND Gates with Open-Collector OutputsGeneral Description Pull-Up Resistor EquationsThis device contains four independent gates each of w ..


74F843SPC
9-Bit Transparent Latch
74F843 9-Bit Transparent Latch January 1988 Revised July 1999 74F843 9-Bit Transparent Latch General Description Features The 74F843 bus interface latch is designed to eliminate the � 3-STATE output extra packages required to buffer existing latches and pro- vide extra data width for wider address/data paths or buses carrying parity. Ordering Code: Order Number Package Number Package Description 74F843SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F843SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE © 1999 DS009453
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