74F373MSAX ,Octal Transparent Latch with 3-STATE OutputsFunctional Description Truth TableThe 74F373 contains eight D-type latches with 3-STATEInputs Outpu ..
74F373MSAX ,Octal Transparent Latch with 3-STATE OutputsFunctional Description Truth TableThe 74F373 contains eight D-type latches with 3-STATEInputs Outpu ..
74F373MSAX ,Octal Transparent Latch with 3-STATE OutputsFeaturesThe 74F373 consists of eight latches with 3-STATE outputs
74F373MSA-74F373MSAX-74F373PC-74F373SC-74F373SCX-74F373SJX
Octal Transparent Latch with 3-STATE Outputs
74F373 Octal Transparent Latch with 3-STATE Outputs May 1988 Revised September 2000 74F373 Octal Transparent Latch with 3-STATE Outputs General Description Features The 74F373 consists of eight latches with 3-STATE outputsEight latches in a single package for bus organized system applications. The flip-flops3-STATE outputs for bus interfacing appear transparent to the data when Latch Enable (LE) is Guaranteed 4000V minimum ESD protection HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state. Ordering Code: Order Number Package Number Package Description 74F373SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F373MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74F373PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 DS009523
