74F32 ,Quad 2-input OR gate54F/74F32Quad2-InputORGateDecember199454F/74F32Quad2-InputORGateGeneralDescription
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54F32-74F32
Quad 2-Input OR Gate
TL/F/9463
54F/74F32
Quad
2-Input
Gate
December 1994
54F/74F32
Quad 2-Input OR Gate
General Description
This device containsfour independent gates, eachof which
performsthe logicOR function.
Features Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F32PC N14A 14-Lead (0.300× Wide)Molded Dual-In-Line
54F32DM (Note2) J14A 14-Lead CeramicDual-In-Line
74F32SC (Note1) M14A 14-Lead (0.150× Wide)Molded SmallOutline, JEDEC
74F32SJ (Note1) M14D 14-Lead (0.300× Wide)Molded SmallOutline, EIAJ
54F32FM(Note2) W14B 14-Lead Cerpack
54F32LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note1: Devicesalso availablein13×reel.Use suffixeSCXandSJX.
Note2: Militarygrade device withenvironmentaland burn-in processing.Use suffixe DMQB, FMQBand LMQB.
Logic Symbol
IEEE/IEC
TL/F/9463–3
Connection Diagrams
Pin Assignmentfor
DIP,SOICand Flatpak
TL/F/9463–2
Pin Assignment
for LCC
TL/F/9463–1
Unit Loading/Fan Out
54F/74F
Pin Names Description U.L. Input IIH/IIL
HIGH/LOW Output IOH/IOL
An,Bn Inputs 1.0/1.0 20 mA/b0.6mA Outputs 50/33.3 b1mA/20mA
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C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
