74AUP1G125GM-74AUP1G125GW Fast Delivery |IC PHOENIX CO.,LIMITED

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74AUP1G125GM-74AUP1G125GW
Low-power buffer/line driver; 3-state
1. General description
The 74AUP1G125 provides a single non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (OE). A HIGH level at pin OE
causes the output to assume a high-impedance OFF-state. This device has the
input-disable feature, which allows floating input signals. The inputs are disabled when the
output enable input OE) is HIGH.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits Wide supply voltage range from 0.8 Vto 3.6V High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 Vto 1.3 V) JESD8-11 (0.9 Vto 1.65V) JESD8-7 (1.2 Vto 1.95V) JESD8-5 (1.8 Vto 2.7V) JESD8-B (2.7 Vto 3.6V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000V MM JESD22-A115-A exceeds 200V CDM JESD22-C101E exceeds 1000V Low static power consumption; ICC = 0.9 A (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6V Low noise overshoot and undershoot < 10 % of VCC Input-disable feature allows floating input conditions IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from 40 Cto+85 C and 40 Cto+125C
74AUP1G125
Low-power buffer/line driver; 3-state
Rev. 6 — 15 August 2012 Product data sheet
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
74AUP1G125GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AUP1G125GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 1.45 0.5 mm
SOT886
74AUP1G125GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 11 0.5 mm
SOT891
74AUP1G125GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74AUP1G125GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
74AUP1G125GX 40 C to +125C X2SON5 X2SON5: plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8 0.8 0.35 mm
SOT1226
Table 2. Marking
74AUP1G125GW pM
74AUP1G125GM pM
74AUP1G125GF pM
74AUP1G125GN pM
74AUP1G125GS pM
74AUP1G125GX pM
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 3. Pin description 1 1 output enable input 2 2 data input
GND 3 3 ground (0V) 4 4 data output
n.c. - 5 not connected
VCC 5 6 supply voltage
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
7. Functional description
[1] H= HIGH voltage level;= LOW voltage level;= Don’t care;= high-impedance OFF-state.
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 4. Function table[1]
LLL H Z
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +4.6 V
IIK input clamping current VI <0V 50 - mA input voltage [1] 0.5 +4.6 V
IOK output clamping current VO <0V 50 - mA output voltage Active mode [1] 0.5 VCC +0.5 V
Power-down mode [1] 0.5 +4.6 V output current VO =0 VtoVCC - 20 mA
ICC supply current - +50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 C to +125C [2]- 250 mW
Table 6. Recommended operating conditions
VCC supply voltage 0.8 3.6 V input voltage 0 3.6 V output voltage Active mode 0 VCC V
Power-down mode; VCC =0V 0 3.6 V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate VCC= 0.8 V to 3.6V 0 200 ns/V
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
10. Static characteristicsTable 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb = 25 C
VIH HIGH-level input voltage VCC = 0.8 V 0.70  VCC -- V
VCC = 0.9 V to 1.95 V 0.65  VCC -- V
VCC = 2.3 V to 2.7 V 1.6 - - V
VCC = 3.0 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 0.8 V - - 0.30  VCCV
VCC = 0.9 V to 1.95 V - - 0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 3.0 V to 3.6 V - - 0.9 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V VCC  0.1 - - V
IO = 1.1 mA; VCC = 1.1 V 0.75  VCC -- V
IO = 1.7 mA; VCC = 1.4 V 1.11 - - V
IO = 1.9 mA; VCC = 1.65 V 1.32 - - V
IO = 2.3 mA; VCC = 2.3 V 2.05 - - V
IO = 3.1 mA; VCC = 2.3 V 1.9 - - V
IO = 2.7 mA; VCC = 3.0 V 2.72 - - V
IO = 4.0 mA; VCC = 3.0 V 2.6 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.1 V
IO = 1.1 mA; VCC = 1.1 V - - 0.3  VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.31 V
IO = 1.9 mA; VCC = 1.65 V - - 0.31 V
IO = 2.3 mA; VCC = 2.3 V - - 0.31 V
IO = 3.1 mA; VCC = 2.3 V - - 0.44 V
IO = 2.7 mA; VCC = 3.0 V - - 0.31 V
IO = 4.0 mA; VCC = 3.0 V - - 0.44 V input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - 0.1 A
IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6V;
VCC = 0 V to 3.6 V 0.1 A
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.2 A
IOFF additional power-off
leakage current
VI or VO = 0 V to 3.6V;
VCC=0Vto 0.2 V 0.2 A
ICC supply current VI = GND or VCC; IO =0A;
VCC= 0.8 V to 3.6 V 0.5 A
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
ICC additional supply current data input; VI = VCC  0.6 V; IO =0A;
VCC =3.3V
[1] -- 40 A
OE input; VI = VCC  0.6 V; IO = 0A;
VCC =3.3V
[1] -- 110 A
all inputs; VI = GND to 3.6 V; =VCC; VCC= 0.8Vto 3.6V
[2] -- 1 A input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC -0.9 -pF output capacitance
output enabled VO = GND; VCC = 0 V - 1.7 - pF
output disabled VCC = 0 V to 3.6 V; VO = GND or VCC -1.5 -pF
Tamb = 40 C to +85C
VIH HIGH-level input voltage VCC = 0.8 V 0.70  VCC -- V
VCC = 0.9 V to 1.95 V 0.65  VCC -- V
VCC = 2.3 V to 2.7 V 1.6 - - V
VCC = 3.0 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 0.8 V - - 0.30  VCCV
VCC = 0.9 V to 1.95 V - - 0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 3.0 V to 3.6 V - - 0.9 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V VCC  0.1 - - V
IO = 1.1 mA; VCC = 1.1 V 0.7  VCC -- V
IO = 1.7 mA; VCC = 1.4 V 1.03 - - V
IO = 1.9 mA; VCC = 1.65 V 1.30 - - V
IO = 2.3 mA; VCC = 2.3 V 1.97 - - V
IO = 3.1 mA; VCC = 2.3 V 1.85 - - V
IO = 2.7 mA; VCC = 3.0 V 2.67 - - V
IO = 4.0 mA; VCC = 3.0 V 2.55 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.1 V
IO = 1.1 mA; VCC = 1.1 V - - 0.3  VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.37 V
IO = 1.9 mA; VCC = 1.65 V - - 0.35 V
IO = 2.3 mA; VCC = 2.3 V - - 0.33 V
IO = 3.1 mA; VCC = 2.3 V - - 0.45 V
IO = 2.7 mA; VCC = 3.0 V - - 0.33 V
IO = 4.0 mA; VCC = 3.0 V - - 0.45 V input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - 0.5 A
IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6V;
VCC = 0 V to 3.6 V 0.5 A
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.5 A
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
IOFF additional power-off
leakage current
VI or VO = 0 V to 3.6V;
VCC=0Vto 0.2 V 0.6 A
ICC supply current VI = GND or VCC; IO =0A;
VCC= 0.8 V to 3.6 V 0.9 A
ICC additional supply current data input; VI = VCC  0.6 V; IO =0A;
VCC =3.3V
[1] -- 50 A
OE input; VI = VCC  0.6 V; IO = 0A;
VCC =3.3V
[1]- - 120 A
all inputs; VI = GND to 3.6 V; =VCC; VCC= 0.8Vto 3.6V
[2] -- 1 A
Tamb = 40 C to +125C
VIH HIGH-level input voltage VCC = 0.8 V 0.75  VCC -- V
VCC = 0.9 V to 1.95 V 0.70  VCC -- V
VCC = 2.3 V to 2.7 V 1.6 - - V
VCC = 3.0 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 0.8 V - - 0.25  VCCV
VCC = 0.9 V to 1.95 V - - 0.30  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 3.0 V to 3.6 V - - 0.9 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V VCC  0.11- - V
IO = 1.1 mA; VCC = 1.1 V 0.6  VCC -- V
IO = 1.7 mA; VCC = 1.4 V 0.93 - - V
IO = 1.9 mA; VCC = 1.65 V 1.17 - - V
IO = 2.3 mA; VCC = 2.3 V 1.77 - - V
IO = 3.1 mA; VCC = 2.3 V 1.67 - - V
IO = 2.7 mA; VCC = 3.0 V 2.40 - - V
IO = 4.0 mA; VCC = 3.0 V 2.30 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.11 V
IO = 1.1 mA; VCC = 1.1 V - - 0.33  VCCV
IO = 1.7 mA; VCC = 1.4 V - - 0.41 V
IO = 1.9 mA; VCC = 1.65 V - - 0.39 V
IO = 2.3 mA; VCC = 2.3 V - - 0.36 V
IO = 3.1 mA; VCC = 2.3 V - - 0.50 V
IO = 2.7 mA; VCC = 3.0 V - - 0.36 V
IO = 4.0 mA; VCC = 3.0 V - - 0.50 V input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - 0.75 A
IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6V;
VCC = 0 V to 3.6 V 0.75 A
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.75 A
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
[1] One input at VCC  0.6 V, other input at VCC or GND.
[2] To show ICC remains very low when the input-disable feature is enabled.
11. Dynamic characteristics
IOFF additional power-off
leakage current
VI or VO = 0 V to 3.6V;
VCC=0Vto 0.2 V 0.75 A
ICC supply current VI = GND or VCC; IO =0A;
VCC= 0.8 V to 3.6 V 1.4 A
ICC additional supply current data input; VI = VCC  0.6 V; IO =0A;
VCC =3.3V
[1] -- 75 A
OE input; VI = VCC  0.6 V; IO = 0A;
VCC =3.3V
[1]- - 180 A
all inputs; VI = GND to 3.6 V; =VCC; VCC= 0.8Vto 3.6V
[2] -- 1 A
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10
Tamb = 25 C; CL = 5 pF
tpd propagation delay A to Y; see Figure8 [2]
VCC = 0.8 V - 20.6 - ns
VCC = 1.1 V to 1.3 V 2.8 5.5 10.5 ns
VCC = 1.4 V to 1.6 V 2.2 3.9 6.1 ns
VCC = 1.65 V to 1.95 V 1.9 3.2 4.8 ns
VCC = 2.3 V to 2.7 V 1.6 2.6 3.6 ns
VCC = 3.0 V to 3.6 V 1.4 2.4 3.1 ns
ten enable time OEto Y; see Figure9 [3]
VCC = 0.8 V - 69.9 - ns
VCC = 1.1 V to 1.3 V 3.1 6.1 11.8 ns
VCC = 1.4 V to 1.6 V 2.5 4.2 6.6 ns
VCC = 1.65 V to 1.95 V 2.1 3.4 5.1 ns
VCC = 2.3 V to 2.7 V 1.8 2.6 3.7 ns
VCC = 3.0 V to 3.6 V 1.7 2.4 3.1 ns
tdis disable time OEto Y; see Figure9 [4]
VCC = 0.8 V - 14.3 - ns
VCC = 1.1 V to 1.3 V 2.7 4.3 6.5 ns
VCC = 1.4 V to 1.6 V 2.1 3.2 4.4 ns
VCC = 1.65 V to 1.95 V 2.0 3.0 4.3 ns
VCC = 2.3 V to 2.7 V 1.4 2.2 2.9 ns
VCC = 3.0 V to 3.6 V 1.7 2.5 3.2 ns
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
Tamb = 25 C; CL = 10 pF
tpd propagation delay A to Y; see Figure8 [2]
VCC = 0.8 V - 24.0 - ns
VCC = 1.1 V to 1.3 V 3.2 6.4 12.3 ns
VCC = 1.4 V to 1.6 V 2.1 4.5 7.3 ns
VCC = 1.65 V to 1.95 V 1.9 3.8 5.5 ns
VCC = 2.3 V to 2.7 V 2.1 3.2 4.2 ns
VCC = 3.0 V to 3.6 V 1.8 3.0 3.8 ns
ten enable time OEto Y; see Figure9 [3]
VCC = 0.8 V - 73.7 - ns
VCC = 1.1 V to 1.3 V 3.6 6.9 13.5 ns
VCC = 1.4 V to 1.6 V 2.3 4.8 7.7 ns
VCC = 1.65 V to 1.95 V 2.0 3.9 5.8 ns
VCC = 2.3 V to 2.7 V 1.8 3.2 4.3 ns
VCC = 3.0 V to 3.6 V 1.7 3.0 3.9 ns
tdis disable time OEto Y; see Figure9 [4]
VCC = 0.8 V - 32.7 - ns
VCC = 1.1 V to 1.3 V 3.4 5.4 7.9 ns
VCC = 1.4 V to 1.6 V 2.2 4.1 5.5 ns
VCC = 1.65 V to 1.95 V 2.2 4.2 5.6 ns
VCC = 2.3 V to 2.7 V 1.7 3.0 3.8 ns
VCC = 3.0 V to 3.6 V 2.1 3.8 4.8 ns
Tamb = 25 C; CL = 15 pF
tpd propagation delay A to Y; see Figure8 [2]
VCC = 0.8 V - 27.4 - ns
VCC = 1.1 V to 1.3 V 3.6 7.2 14.1 ns
VCC = 1.4 V to 1.6 V 3.0 5.1 8.1 ns
VCC = 1.65 V to 1.95 V 2.2 4.3 6.3 ns
VCC = 2.3 V to 2.7 V 2.0 3.7 4.9 ns
VCC = 3.0 V to 3.6 V 2.0 3.5 4.4 ns
ten enable time OEto Y; see Figure9 [3]
VCC = 0.8 V - 77.5 - ns
VCC = 1.1 V to 1.3 V 4.0 7.7 15.2 ns
VCC = 1.4 V to 1.6 V 3.0 5.3 8.4 ns
VCC = 1.65 V to 1.95 V 2.3 4.4 6.5 ns
VCC = 2.3 V to 2.7 V 2.1 3.6 5.0 ns
VCC = 3.0 V to 3.6 V 2.0 3.5 4.5 ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
tdis disable time OEto Y; see Figure9 [4]
VCC = 0.8 V - 60.8 - ns
VCC = 1.1 V to 1.3 V 4.3 6.5 9.2 ns
VCC = 1.4 V to 1.6 V 3.0 5.0 6.5 ns
VCC = 1.65 V to 1.95 V 3.0 5.3 6.6 ns
VCC = 2.3 V to 2.7 V 2.1 3.8 4.9 ns
VCC = 3.0 V to 3.6 V 2.9 5.0 6.2 ns
Tamb = 25 C; CL = 30 pF
tpd propagation delay A to Y; see Figure8 [2]
VCC = 0.8 V - 37.4 - ns
VCC = 1.1 V to 1.3 V 4.8 9.5 19.0 ns
VCC = 1.4 V to 1.6 V 4.0 6.7 10.8 ns
VCC = 1.65 V to 1.95 V 2.9 5.6 8.4 ns
VCC = 2.3 V to 2.7 V 2.7 4.8 6.3 ns
VCC = 3.0 V to 3.6 V 2.7 4.6 5.8 ns
ten enable time OEto Y; see Figure9 [3]
VCC = 0.8 V - 88.9 - ns
VCC = 1.1 V to 1.3 V 5.2 9.9 19.8 ns
VCC = 1.4 V to 1.6 V 4.0 6.8 10.8 ns
VCC = 1.65 V to 1.95 V 3.0 5.6 8.5 ns
VCC = 2.3 V to 2.7 V 2.7 4.8 6.5 ns
VCC = 3.0 V to 3.6 V 2.7 4.6 6.0 ns
tdis disable time OEto Y; see Figure9 [4]
VCC = 0.8 V - 49.9 - ns
VCC = 1.1 V to 1.3 V 6.0 9.9 13.3 ns
VCC = 1.4 V to 1.6 V 4.4 7.7 9.6 ns
VCC = 1.65 V to 1.95 V 5.1 8.7 11.1 ns
VCC = 2.3 V to 2.7 V 3.6 6.2 7.4 ns
VCC = 3.0 V to 3.6 V 5.2 8.7 10.5 ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
[1] All typical values are measured at nominal VCC.
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZH and tPZL.
[4] tdis is the same as tPHZ and tPLZ.
[5] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N+ (CL VCC2 fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of the outputs.
Tamb = 25 C
CPD power dissipation capacitance f = 1 MHz; VI= GND to VCC [5]
output enabled
VCC = 0.8 V - 2.7 - pF
VCC = 1.1 V to 1.3 V - 2.8 - pF
VCC = 1.4 V to 1.6 V - 2.9 - pF
VCC = 1.65 V to 1.95 V - 3.0 - pF
VCC = 2.3 V to 2.7 V - 3.6 - pF
VCC = 3.0 V to 3.6 V - 4.2 - pF
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10
CL = 5 pF
tpd propagation delay A to Y; see Figure8 [1]
VCC = 1.1 V to 1.3 V 2.5 11.7 2.5 12.9 ns
VCC = 1.4 V to 1.6 V 2.0 7.3 2.0 8.1 ns
VCC = 1.65 V to 1.95 V 1.7 6.1 1.7 6.7 ns
VCC = 2.3 V to 2.7 V 1.4 4.3 1.4 4.9 ns
VCC = 3.0 V to 3.6 V 1.2 3.9 1.2 4.4 ns
ten enable time OEto Y; see Figure9 [2]
VCC = 1.1 V to 1.3 V 2.9 13.9 2.9 15.4 ns
VCC = 1.4 V to 1.6 V 2.3 7.7 2.3 8.3 ns
VCC = 1.65 V to 1.95 V 2.0 6.2 2.0 6.8 ns
VCC = 2.3 V to 2.7 V 1.7 4.5 1.7 5.0 ns
VCC = 3.0 V to 3.6 V 1.7 3.5 1.7 3.9 ns
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
tdis disable time OEto Y; see Figure9 [3]
VCC = 1.1 V to 1.3 V 2.7 7.3 2.7 8.2 ns
VCC = 1.4 V to 1.6 V 2.1 5.1 2.1 5.7 ns
VCC = 1.65 V to 1.95 V 2.0 5.0 2.0 5.7 ns
VCC = 2.3 V to 2.7 V 1.4 3.3 1.4 4.1 ns
VCC = 3.0 V to 3.6 V 1.7 3.4 1.7 3.9 ns
CL = 10 pF
tpd propagation delay A to Y; see Figure8 [1]
VCC = 1.1 V to 1.3 V 3.0 13.8 3.0 15.2 ns
VCC = 1.4 V to 1.6 V 1.9 8.5 1.9 9.4 ns
VCC = 1.65 V to 1.95 V 1.7 6.8 1.7 7.6 ns
VCC = 2.3 V to 2.7 V 1.6 5.3 1.6 5.9 ns
VCC = 3.0 V to 3.6 V 1.6 4.6 1.6 5.2 ns
ten enable time OEto Y; see Figure9 [2]
VCC = 1.1 V to 1.3 V 3.4 15.8 3.4 17.5 ns
VCC = 1.4 V to 1.6 V 2.2 8.6 2.2 9.4 ns
VCC = 1.65 V to 1.95 V 1.9 6.8 1.9 7.4 ns
VCC = 2.3 V to 2.7 V 1.7 5.3 1.7 5.9 ns
VCC = 3.0 V to 3.6 V 1.7 4.3 1.7 4.8 ns
tdis disable time OEto Y; see Figure9 [3]
VCC = 1.1 V to 1.3 V 3.4 8.8 3.4 9.9 ns
VCC = 1.4 V to 1.6 V 2.2 6.2 2.2 7.1 ns
VCC = 1.65 V to 1.95 V 1.9 6.3 1.9 7.1 ns
VCC = 2.3 V to 2.7 V 1.7 4.5 1.7 5.1 ns
VCC = 3.0 V to 3.6 V 1.7 5.0 1.7 5.6 ns
CL = 15 pF
tpd propagation delay A to Y; see Figure8 [1]
VCC = 1.1 V to 1.3 V 3.3 15.8 3.3 17.5 ns
VCC = 1.4 V to 1.6 V 2.5 9.8 2.5 10.9 ns
VCC = 1.65 V to 1.95 V 2.0 7.9 2.0 8.8 ns
VCC = 2.3 V to 2.7 V 1.8 6.0 1.8 6.7 ns
VCC = 3.0 V to 3.6 V 1.8 5.4 1.8 6.1 ns
ten enable time OEto Y; see Figure9 [2]
VCC = 1.1 V to 1.3 V 3.7 17.6 3.7 19.6 ns
VCC = 1.4 V to 1.6 V 2.5 9.8 2.5 10.7 ns
VCC = 1.65 V to 1.95 V 2.1 7.7 2.1 8.5 ns
VCC = 2.3 V to 2.7 V 2.0 6.1 2.0 6.8 ns
VCC = 3.0 V to 3.6 V 1.9 4.9 1.9 5.5 ns
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10
NXP Semiconductors 74AUP1G125
Low-power buffer/line driver; 3-state
[1] tpd is the same as tPLH and tPHL.
[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPHZ and tPLZ.
tdis disable time OEto Y; see Figure9 [3]
VCC = 1.1 V to 1.3 V 3.7 10.3 3.7 11.6 ns
VCC = 1.4 V to 1.6 V 2.5 7.4 2.5 8.4 ns
VCC = 1.65 V to 1.95 V 2.1 7.4 2.1 8.9 ns
VCC = 2.3 V to 2.7 V 2.0 5.1 2.0 6.4 ns
VCC = 3.0 V to 3.6 V 1.9 6.6 1.9 7.4 ns
CL = 30 pF
tpd propagation delay A to Y; see Figure8 [1]
VCC = 1.1 V to 1.3 V 4.4 21.6 4.4 24.0 ns
VCC = 1.4 V to 1.6 V 3.0 13.0 3.0 14.5 ns
VCC = 1.65 V to 1.95 V 2.6 10.3 2.6 11.5 ns
VCC = 2.3 V to 2.7 V 2.5 7.8 2.5 8.7 ns
VCC = 3.0 V to 3.6 V 2.5 7.5 2.5 8.3 ns
ten enable time OEto Y; see Figure9 [2]
VCC = 1.1 V to 1.3 V 4.8 22.8 4.8 25.3 ns
VCC = 1.4 V to 1.6 V 3.1 12.6 3.1 14.1 ns
VCC = 1.65 V to 1.95 V 2.8 10.2 2.8 11.3 ns
VCC = 2.3 V to 2.7 V 2.6 7.8 2.6 8.8 ns
VCC = 3.0 V to 3.6 V 2.6 6.9 2.6 7.7 ns
tdis disable time OEto Y; see Figure9 [3]
VCC = 1.1 V to 1.3 V 4.8 14.8 4.8 16.5 ns
VCC = 1.4 V to 1.6 V 3.1 10.7 3.1 12.1 ns
VCC = 1.65 V to 1.95 V 2.8 12.4 2.8 13.8 ns
VCC = 2.3 V to 2.7 V 2.6 8.6 2.6 9.6 ns
VCC = 3.0 V to 3.6 V 2.6 10.8 2.6 13.1 ns
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure10

Partno	Mfg	Dc	Qty	Available	Descript
74AUP1G125GM	NXP	N/a	2270	avai	Low-power buffer/line driver; 3-state
74AUP1G125GW	NXP	N/a	1309	avai	Low-power buffer/line driver; 3-state