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74ALVC245PWNXPN/a10000avai74ALVC245; Octal bus transceiver; 3-state


74ALVC245PW ,74ALVC245; Octal bus transceiver; 3-stateFeatures■ Wide supply voltage range from 1.65 V to 3.6 V■ Complies with JEDEC standard:◆ JESD8-7 (1 ..
74ALVC38MTCX ,Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and OutputsElectrical CharacteristicsVCCSymbol Parameter Conditions Min Max Units (V)V HIGH Level Input Voltag ..
74ALVC38MTCX ,Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputsapplications with I/O compatibility up toCC

74ALVC245PW
Octal bus transceiver; 3-state
General descriptionThe 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible
outputs in both send and receive directions. The 74ALVC245 features an output enable
input (OE) for easy cascading and send/receive input (DIR) for direction control. OE
controls the outputs, so that the buses are effectively isolated. Features Wide supply voltage range from 1.65 V to 3.6 V Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.5 V) JESD8B/JESD36 (2.7 V to 3.6 V) 3.6 V tolerant inputs/outputs CMOS low-power consumption Direct interface with TTL levels (2.7 V to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V Ordering information
74AL VC245
Octal bus transceiver; 3-state
Rev. 02 — 7 January 2008 Product data sheet
Table 1. Ordering information

74ALVC245D −40 °Cto+85°C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74ALVC245PW −40 °Cto+85°C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
74ALVC245BQ −40 °Cto+85°C DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quadflat package;no leads;20 terminals;
body 2.5× 4.5× 0.85 mm
SOT764-1
NXP Semiconductors 74AL VC245
Octal bus transceiver; 3-state Functional diagram
NXP Semiconductors 74AL VC245
Octal bus transceiver; 3-state Pinning information
5.1 Pinning
5.2 Pin description Functional description

[1]H= HIGH voltage level; L= LOW voltage level; X= don’t care; Z= high-impedance OFF-state.
Table 2. Pin description

DIR 1 direction control
A[0:7] 2, 3, 4, 5, 6, 7, 8, 9 data input/output
B[0:7] 18, 17, 16, 15, 14, 13, 12,
data input/output
GND 10 ground (0V) 19 output enable input (active LOW)
VCC 20 supply voltage
Table 3. Function table[1]
L A = B input H input B = A Z Z
NXP Semiconductors 74AL VC245
Octal bus transceiver; 3-state Limiting values

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
[4] Ptot derates linearly with 8 mW/K above 70°C.
[5] Ptot derates linearly with 5.5 mW/K above 60°C.
[6] Ptot derates linearly with 4.5 mW/K above 60°C. Recommended operating conditions
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +4.6 V input voltage −0.5 +4.6 V
IIK input clamping current VI < 0 V [1] −50 - mA
IOK output clamping current VO >VCC or VO <0V - ±50 mA output voltage output HIGH or LOW state [2] −0.5 VCC+ 0.5V
output 3-state [2] −0.5 +4.6 V
power-down mode, VCC = 0 V [3] −0.5 +4.6 V output current VO = 0 V to VCC - ±50 mA
ICC supply current - 100 mA
IGND ground current −100 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +85°C
SO20 package [4]- 500 mW
TSSOP20 package [5]- 500 mW
DHVQFN20 package [6]- 500 mW
Table 5. Recommended operating conditions

VCC supply voltage 1.65 3.6 V input voltage 0 3.6 V output voltage output HIGH or LOW state 0 VCC V
output 3-state 0 3.6 V
power-down mode, VCC = 0 V 0 3.6 V
Tamb ambient temperature −40 +85 °C
Δt/ΔV input transition rise and fall rate VCC= 1.65 V to 2.7V - 20 ns/V
VCC= 2.7 V to 3.6V - 10 ns/V
NXP Semiconductors 74AL VC245
Octal bus transceiver; 3-state Static characteristics

[1] All typical values are measured at VCC = 3.3 V and Tamb = 25°C.
[2] For transceivers, the parameter IOZ includes the input leakage current.
Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0V).
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65 × VCC -- V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35 × VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VOH HIGH-level output voltage VI = VIH or VIL = 100 μA; VCC= 1.65 V to 3.6 V VCC − 0.2 - - V = 6 mA; VCC= 1.65 V 1.25 - - V = 12 mA; VCC= 2.3 V 1.8 - - V = 18 mA; VCC= 2.3 V 1.7 - - V = 12 mA; VCC= 2.7 V 2.2 - - V = 18 mA; VCC= 3.0 V 2.4 - - V = 24 mA; VCC= 3.0 V 2.2 - - V
VOL LOW-level output voltage VI = VIH or VIL= −100 μA; VCC= 1.65Vto 3.6V - - 0.2 V= −6 mA; VCC= 1.65 V - - 0.3 V= −12 mA; VCC= 2.3 V - - 0.4 V= −18 mA; VCC= 2.3 V - - 0.6 V= −12 mA; VCC= 2.7 V - - 0.4 V= −18 mA; VCC= 3.0 V - - 0.4 V= −24 mA; VCC= 3.0 V - - 0.55 V
IOZ OFF-state output current VI =VIH or VIL; VO =VCCor GND;
VCC= 3.6V
[2] - ±0.1 ±10.0 μA input leakage current VI =VCCor GND; VCC = 3.6V - ±0.1 ±5.0 μA
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - ±0.1 ±10.0 μA
ICC supply current VI =VCCor GND; IO = 0 A;
VCC= 3.6V 0.2 10 μA
ΔICC additional supply current per input pin; VCC= 3.0 V to 3.6 V; = VCC − 0.6 V; IO = 0A; 5 750 μA input capacitance - 3.5 - pF
CI/O input/output capacitance - 3.5 - pF
NXP Semiconductors 74AL VC245
Octal bus transceiver; 3-state
10. Dynamic characteristics

[1] All typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V and 3.3V.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] CPD is used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2× fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
Σ(CL× VCC2×fo)= sum of the outputs.
Table 7. Dynamic characteristics

Voltages are referenced to GND (ground=0 V); for test circuit see Figure7.
tpd propagation delay Anto Bn; Bn to An; see Figure5 [2]
VCC = 1.65 V to 1.95 V 1.0 2.7 6.0 ns
VCC = 2.3 V to 2.7 V 1.0 2.1 3.5 ns
VCC = 2.7 V 1.0 3.0 3.6 ns
VCC = 3.0 V to 3.6 V 1.0 2.3 3.4 ns
ten enable time OEto An; OEto Bn; see Figure6 [2]
VCC = 1.65 V to 1.95 V 1.0 4.0 8.6 ns
VCC = 2.3 V to 2.7 V 1.0 3.0 6.0 ns
VCC = 2.7 V 1.0 2.6 6.3 ns
VCC = 3.0 V to 3.6 V 1.0 2.9 5.5 ns
tdis disable time OEto An; OEto Bn; see Figure6 [2]
VCC = 1.65 V to 1.95 V 1.0 4.4 8.0 ns
VCC = 2.3 V to 2.7 V 1.0 2.3 4.8 ns
VCC = 2.7 V 1.0 3.3 5.3 ns
VCC = 3.0 V to 3.6 V 1.0 3.2 5.5 ns
CPD power dissipation
capacitance
per buffer;VI= GNDto VCC;VCC= 3.3V [3]
outputs enabled - 25 - pF
outputs disabled - 1 - pF
NXP Semiconductors 74AL VC245
Octal bus transceiver; 3-state
11. Waveforms
Table 8. Measurement points

1.65 V to 1.95 V VCC 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH − 0.15 V
2.3 V to 2.7 V VCC 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH − 0.15 V
2.7 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V
3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V
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