74ACTQ74SCX ,Quiet Series Dual D-Type Positive Edge-Triggered Flip-FlopBlock DiagramPlease note that this diagram is provided only for the understanding of logic operatio ..
74ACTQ821SPC ,Quiet Series 10-Bit D-Type Flip-Flop with 3-STATE OutputsFunctional Description Function TableThe ACTQ821 consists of ten-bit D-type edge-triggeredInputs In ..
74ACTQ821SPC ,Quiet Series 10-Bit D-Type Flip-Flop with 3-STATE Outputsfeatures
74ACTQ74PC-74ACTQ74SC-74ACTQ74SCX
Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop
74ACTQ74 Quiet Series Dual D-Type March 1993 Revised November 1999 74ACTQ74 Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop Asynchronous Inputs: General Description LOW input to S (Set) sets Q to HIGH level D The 74ACTQ74 is a dual D-type flip-flop with Asynchro- LOW input to C (Clear) sets Q to LOW level nous Clear and Set inputs and complementary (Q, Q) out- D puts. Information at the input is transferred to the outputs Clear and Set are independent of clock on the positive edge of the clock pulse. Clock triggering Simultaneous LOW on C and S makes D D occurs at a voltage level of the clock pulse and is not both Q and Q HIGH directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information Features present will not be transferred to the outputs until the next I reduced by 50% CC rising edge of the Clock Pulse input. Guaranteed simultaneous switching noise level and The ACTQ74 utilizes Fairchild Quiet Series technology to dynamic threshold performance guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series featuresGuaranteed pin-to-pin skew AC performance GTO output control and undershoot corrector in additionImproved latch-up immunity to a split ground bus for superior performance. 4 kV minimum ESD immunity TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74ACTQ74SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74ACTQ74SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ74PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering form. Connection Diagram Pin Descriptions Pin Names Description D , D Data Inputs 1 2 CP , CP Clock Pulse Inputs 1 2 C , C Direct Clear Inputs D1 D2 S , S Direct Set Inputs D1 D2 Q , Q , Q , Q Outputs 1 1 2 2 FACT, FACT Quiet Series and GTO are trademarks of . © 1999 DS010920
