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74ACTQ08SC-74ACTQ08SJ-74ACTQ08SJX Fast Delivery,Good Price
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74ACTQ08SCFAIRCHILN/a114avaiQuiet Series Quad 2-Input AND Gate
74ACTQ08SJFAIN/a57avaiQuiet Series Quad 2-Input AND Gate
74ACTQ08SJXNSN/a15avaiQuiet Series Quad 2-Input AND Gate


74ACTQ08SC ,Quiet Series Quad 2-Input AND GateFeaturesThe ACTQ08 contains four, 2-input AND gates and utilizes

74ACTQ08SC-74ACTQ08SJ-74ACTQ08SJX
Quiet Series Quad 2-Input AND Gate
74ACTQ08 Quiet Series Quad 2-Input AND Gate August 1990 Revised November 1999 74ACTQ08 Quiet Series Quad 2-Input AND Gate General Description Features The ACTQ08 contains four, 2-input AND gates and utilizesI reduced by 50% CC Fairchild Quiet Series technology to guarantee quiet out- Guaranteed simultaneous switching noise level and put switching and improved dynamic threshold perfor- dynamic threshold performance mance. FACT Quiet Series features GTO output control Improved latch-up immunity and undershoot corrector in addition to a split ground bus Outputs source/sink 24 mA for superior ACMOS performance. TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74ACTQ08SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74ACTQ08SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ08PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A , B Inputs n n O Outputs n FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of . © 1999 DS010891
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