74ACT258SCX ,Quad 2-Input Multiplexer with 3-STATE OutputsFunctional DescriptionThe ACT258 is a quad 2-input multiplexer with 3-STATEOutput Select Dataoutput ..
74ACT2708PC ,64 x 9 First-In/ First-Out MemoryApplications• High-speed disk or tape controllers • A/D output buffers• High-speed graphics pixel b ..
74ACT273 ,Octal D-Type Flip-Floplogic diagram has not be used to estimate propagation delays2/1174ACT273
74ACT273M ,OCTAL D-TYPE FLIP FLOP WITH CLEARABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage-0.5 to +7 VCCV DC Input V ..
74ACT273MTC ,Octal D-Type Flip-Flopapplications where the true output onlyis required and the Clock and Master Reset are common toall ..
74ACT273MTCX ,Octal D-Type Flip-FlopFeaturesThe AC273 and ACT273 have eight edge-triggered D-type
74ACT258SC-74ACT258SCX
Quad 2-Input Multiplexer with 3-STATE Outputs
74ACT258 Quad 2-Input Multiplexer with 3-STATE Outputs November 1988 Revised November 1999 74ACT258 Quad 2-Input Multiplexer with 3-STATE Outputs General Description Features The ACT258 is a quad 2-input multiplexer with 3-STATEI and I reduced by 50% CC OZ outputs. Four bits of data from two sources can be selected Multiplexer expansion by tying outputs together using a common data select input. The four outputs Inverting 3-STATE outputs present the selected data in the complement (inverted) Outputs source/sink 24 mA form. The outputs may be switched to a high impedance state with a HIGH on the common Output Enable (OE)TTL-compatible inputs input, allowing the outputs to interface directly with bus-ori- ented systems. Ordering Code: Order Number Package Number Package Description 74ACT258SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74ACT258SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE 11, 5.3mm Wide 74ACT258MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT258PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description S Common Data Select Input OE 3-STATE Output Enable Input I –I Data Inputs from Source 0 0a 0d I –I Data Inputs from Source 1 1a 1d Z –Z 3-STATE Inverting Data Outputs a d FACT is a trademark of . © 1999 DS009950
