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74ACT16543DGGRTIN/a1049avai16-Bit Registered Transceivers With 3-State Outputs
74ACT16543DLTIN/a50avai16-Bit Registered Transceivers With 3-State Outputs


74ACT16543DGGR ,16-Bit Registered Transceivers With 3-State Outputs 54ACT16543, 74ACT16543 16-BIT REGISTERED TRANSCEIVERSWITH 3-STATE OUTPUTSSCAS126B – MARCH 1990 – R ..
74ACT16543DL ,16-Bit Registered Transceivers With 3-State Outputs 54ACT16543, 74ACT16543 16-BIT REGISTERED TRANSCEIVERSWITH 3-STATE OUTPUTSSCAS126B – MARCH 1990 – R ..
74ACT16623DL ,16-Bit Bus Transceivers With 3-State Outputs 54ACT16623, 74ACT16623 16-BIT BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCAS152A – JANUARY 1991 – REVISE ..
74ACT16623DLR ,16-Bit Bus Transceivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
74ACT16640DLR ,16-Bit Bus Transceivers With 3-State Outputs 48-SSOP -40 to 85
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74HC174D ,Hex D-type flip-flop with reset; positive-edge triggerLogic diagram74HC_HCT174 All information provided in this document is subject to legal disclaimers. ..
74HC174N ,Hex D-type flip-flop with reset; positive-edge triggerPin configuration DIP16 Fig 5.
74HC174PW ,Hex D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175D ,Quad D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175DB ,Quad D-type flip-flop with reset; positive-edge triggerGENERAL DESCRIPTIONcorresponding output (Q ) of the flip-flop.nThe 74HC/HCT175 are high-speed Si-ga ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerFeatures and benefits Input levels: For 74HC175: CMOS level For 74HCT175: TTL level Four edge-t ..


74ACT16543DGGR-74ACT16543DL
16-Bit Registered Transceivers With 3-State Outputs
Flow-Through Architecture OptimizesPCB Layout Distributed VCC and GND Pin
Configurations Minimize High-Speed
Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings, and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings

description

The ’ACT16543 are 16-bit registered transceivers
that contain two sets of D-type latches for
temporary storage of data flowing in either
direction. The ’ACT16543 can be used as two
8-bit transceivers or one 16-bit transceiver.
Separate latch enable (LEAB or LEBA) and
output-enable (OEAB or OEBA) inputs are
provided for each register to permit independent
control in either direction of data flow.
The A-to-B enable (CEAB) and OEAB inputs must
be low to enter data from A or to output data to B.
Having CEAB low and LEAB low makes the
A-to-B latches transparent; a subsequent low-to-
high transition at LEAB puts the A latches in the
storage mode. Data flow from B to A is similar, but
requires using the CEBA, LEBA, and OEBA
inputs.
The 74ACT16543 is packaged in TI’s shrink small-outline package, which provides twice the functionality of
standard small-outline packages in the same printed-circuit-board area.
The 54ACT16543 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16543 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1CEAB
GND
1A1
1A2CC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2CEAB
2LEAB
2OEAB
1CEBA
GND
1B1
1B2CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
GND
2CEBA
2LEBA
2OEBA
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