74ACT158 ,QUAD 2 CHANNEL MULTIPLEXER (INV.)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74ACT158 ,QUAD 2 CHANNEL MULTIPLEXER (INV.)74ACT158QUAD 2 CHANNEL MULTIPLEXER (INV.) ■ HIGH SPEED: t = 6.5ns (TYP.) at V = 5VPD CC■ LOW POWER ..
74ACT158 ,QUAD 2 CHANNEL MULTIPLEXER (INV.)
74ACT158 ,QUAD 2 CHANNEL MULTIPLEXER (INV.)
74ACT158PC ,Quad 2-Input MultiplexerFunctional Description Truth TableThe ACT158 quad 2-input multiplexer selects four bits of Inputs O ..
74ACT158PC ,Quad 2-Input Multiplexer74ACT158 Quad 2-Input MultiplexerNovember 1988Revised November 199974ACT158Quad 2-Input Multiplexer
74HC165D ,8-bit parallel-in/serial-out shift registerFeaturesn Asynchronous 8-bit parallel loadn Synchronous serial inputn Complies with JEDEC standard ..
74HC165N ,74HC/HCT165; 8-bit parallel-in/serial-out shift registerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC165PW ,74HC/HCT165; 8-bit parallel-in/serial-out shift registerAPPLICATIONS0D inputs are loaded into the register asynchronously.7• Parallel-to-serial data conver ..
74HC165PW ,74HC/HCT165; 8-bit parallel-in/serial-out shift register74HC165; 74HCT1658-bit parallel-in/serial out shift registerRev. 03 — 14 March 2008 Product data sh ..
74HC165PW ,74HC/HCT165; 8-bit parallel-in/serial-out shift registerGeneral descriptionThe 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply withJEDEC ..
74HC166D ,8-bit parallel-in/serial-out shift registerGENERAL DESCRIPTIONThe pin assignment for the CP and CE inputs is arbitraryThe 74HC/HCT166 are high ..
74ACT158
QUAD 2 CHANNEL MULTIPLEXER (INV.)
1/10April 2001 HIGH SPEED: tPD = 6.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), VIL = 0.8V (MAX.) 50Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS:PLH ≅ tPHL OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 158 IMPROVED LATCH-UP IMMUNITY
DESCRIPTIONThe 74ACT158 is an advanced high-speed CMOS
QUAD 2-CHANNEL MULTIPLEXER fabricated
with sub-micron silicon gate and double-layer
metal wiring C2 MOS tecnology.
It consists of four 2-input digital multiplexer with
common select and strobe inputs. It is an inverting
multiplexer. When the STROBE input is held high
selection of data is inhibit and all the outputs
become high. The SELECT decoding determines
whether the A or B inputs get routed to their
corresponding Y outputs.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74ACT158QUAD 2 CHANNEL MULTIPLEXER (INV.)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74ACT1582/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
LOGIC DIAGRAM
74ACT1583/10
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS 1) VIN from 0.8 V to 2.0 V
74ACT1584/10
DC SPECIFICATIONS 1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on trasmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
(*) Voltage range is 5.0V ± 0.5V
74ACT1585/10
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74ACT1586/10
WAVEFORM 1: PROPAGATION DELAYS FOR NON INVERTING CONDITIONS (f=1MHz; 50% duty cycle)
WAVEFORM 2: PROPAGATION DELAYS FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle)
