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74ACQ573
Quiet Series Octal Latch with TRI-STATE Outputs
TL/F/10633
54ACQ/74ACQ573
54ACTQ/74ACTQ573
Quiet
Series
Octal
Latch
with
TRI-STATE
Outputs
March 1993
54ACQ/74ACQ573# 54ACTQ/74ACTQ573
Quiet Series Octal Latch with TRI-STATEÉ Outputs
General Description
The ’ACQ/’ACTQ573isa high-speed octal latch with buff-
ered common Latch Enable(LE) andbuffered common Out-
put Enable (OE) inputs.The ’ACQ/’ACTQ573is functionally
identicaltothe ’ACQ/’ACTQ373butwith inputsand outputs opposite sidesofthe package.The ’ACQ/’ACTQ utilizes
NSC Quiet Series technologyto guarantee quiet output
switching and improved dynamic threshold performance.
FACT Quiet SeriesTM features GTOTM output controland
undershoot correctorin additiontoa split groundbusfor
superior performance.
Features ICCandIOZ reducedby 50% Guaranteed simultaneous switching noise leveland
dynamic threshold performance Guaranteed pin-to-pin skewAC performance Improved latch-up immunity Inputs and outputson opposite sidesof package allow
easy interface with microprocessors Outputs source/sink24mA Faster prop delays than standard ’ACT5734kV minimum ESD immunity Standard Military Drawing (SMD) ’ACTQ573: 5962-8766402
Logic Symbols
TL/F/10633–1
IEEE/IEC
TL/F/10633–2
Connection Diagrams
Pin Assignmentfor DIP,
Flatpak, QSOPand SOIC
TL/F/10633–3
Pin Names Description
D0–D7 DataInputs Latch EnableInput TRI-STATE Output EnableInput
O0–O7 TRI-STATE LatchOutputs
Pin Assignment
for LCC
TL/F/10633–4TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
FACTTM,FACTQuiet SeriesTMand GTOTMare trademarksof NationalSemiconductor Corporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
