74AC74 ,DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOPFeaturesThe AC/ACT74 is a dual D-type flip-flop with Asynchronous * I reduced by 50%CCClear and Set ..
74AC74B ,DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEARLOGIC DIAGRAM This
74AC74M ,DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEARAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74AC74MTCX ,Dual D-Type Positive Edge-Triggered Flip-Flop74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-FlopNovember 1988Revised February 200574A ..
74AC74MTR ,DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEARlogic diagram has not be used to estimate propagation delays2/1274AC74
74AC74MTR ,DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR74AC74DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR ■ HIGH SPEED: f = 300MHz (TYP.) at V = 5VMAX CC■ ..
74HC138BQ ,3-to-8 line decoder, demultiplexer; inverting 74HC138; 74HCT1383-to-8 line decoder/demultiplexer; invertingRev. 4 — 27 June 2012 Product data sh ..
74HC138D ,3-to-8 line decoder, demultiplexer; invertingPin configuration DIP16, SO16, SSOP16 and Fig 5.
74HC138D- ,3-to-8 line decoder, demultiplexer; invertingGENERAL DESCRIPTIONusing one of the active LOW enable inputs as the dataThe 74HC/HCT138 are high-sp ..
74HC138DB ,3-to-8 line decoder, demultiplexer; invertingfeatures three enable inputs: two active LOW(E and E ) and one active HIGH (E ). Every output will ..
74HC138DB ,3-to-8 line decoder, demultiplexer; invertingLogic diagram5. Pinning information5.1 Pinning 74HC138BQ74HCT138BQ74HC13874HCT138terminal 1index ar ..
74HC138N ,74HC/HCT138; 3-to-8 line decoder/demultiplexer; invertingINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74AC74
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP
© 1999 Fairchild Semiconductor Corporation DS009920 www.fairchildsemi.com
• 74ACT74
Dual
pe Posit
ve Edge-
ggered Fl
ip-
lop
