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74AC153MTCFSC ?N/a107avaiDual 4-Input Multiplexer
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74AC153SJNSCN/a7avaiDual 4-Input Multiplexer
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74AC153SCX ,Dual 4-Input MultiplexerFunctional Description Truth TableThe AC/ACT153 is a dual 4-input multiplexer. It can select Select ..
74AC153SJ ,Dual 4-Input MultiplexerFunctional Description Truth TableThe AC/ACT153 is a dual 4-input multiplexer. It can select Select ..
74AC153SJX ,Dual 4-Input MultiplexerFeaturesThe AC/ACT153 is a high-speed dual 4-input multiplexer

74AC153MTC-74AC153PC-74AC153SCX-74AC153SJ-74AC153SJX-74ACT153SCX
Dual 4-Input Multiplexer
74AC153 • 74ACT153 Dual 4-Input Multiplexer November 1988 Revised November 1999 74AC153  74ACT153 Dual 4-Input Multiplexer General Description Features The AC/ACT153 is a high-speed dual 4-input multiplexerI reduced by 50% CC with common select inputs and individual enable inputs for Outputs source/sink 24 mA each section. It can select two lines of data from four ACT153 has TTL-compatible inputs sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the AC/ACT153 can act as a function generator and gener- ate any two functions of three variables. Ordering Code: Order Number Package Number Package Description 74AC153SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74AC153SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC153MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC153PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT153SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74ACT153MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description I –I Side A Data Inputs 0a 3a I –I Side B Data Inputs 0b 3b S , S Common Select Inputs 0 1 E Side A Enable Input a E Side B Enable Input b Z Side A Output a Z Side B Output b FACT is a trademark of . © 1999 DS009928
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