74ABT2240CSCX ,Octal Buffer/Line Driver with 25 Ohm Series Resistors in the OutputsElectrical CharacteristicsVSymbol Parameter Min Typ Max Units ConditionsCCV Input HIGH Voltage 2.0 ..
74ABT2241D ,Octal buffer with 30ohm series termination resistors; 3-State
74ABT2244CMTC ,Octal Buffer/Line Driver with 25-Ohm Series Resistors in the Outputs74ABT2244 Octal Buffer/Line Driver with 25 Series Resistors in the OutputsMay 1992Revised March 20 ..
74ABT2244CSCX ,Octal Buffer/Line Driver with 25-Ohm Series Resistors in the OutputsElectrical CharacteristicsVSymbol Parameter Min Typ Max Units ConditionsCCV Input HIGH Voltage 2.0 ..
74ABT2244CSCX ,Octal Buffer/Line Driver with 25-Ohm Series Resistors in the OutputsFeaturesThe ABT2244 is an octal buffer and line driver designed to
74ABT2240CSC-74ABT2240CSCX
Octal Buffer/Line Driver with 25 Ohm Series Resistors in the Outputs
74ABT2240 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs March 1994 Revised November 1999 74ABT2240 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs General Description Features The ABT2240 is an inverting octal buffer and line driverGuaranteed latchup protection designed to drive the capacitive inputs of MOS memoryHigh impedance glitch-free bus loading during entire drivers, address drivers, clock drivers, and bus-oriented power up and power down cycle transmitters/receivers. Nondestructive hot insertion capability The 25Ω series resistors in the outputs reduce ringing and eliminate the need for external resistors. Ordering Code: Order Number Package Number Package Description 74ABT2240CSC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ABT2240CSJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ABT2240CMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74ABT2240CMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending letter suffix “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Descriptions OE , OE Output Enable Input (Active LOW) 1 2 D –D Data Inputs 0 7 O –O Outputs 0 7 Schematic of Each Output Truth Table OE I O OE I O 1 0–3 0–3 2 4–7 4–7 H X Z H X Z L H L L H L L L H L L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © 1999 DS011665
