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74ABT16244TEXASN/a35avai16-Bit Buffer/Line Driver with TRI-STATE Outputs


74ABT16244 ,16-Bit Buffer/Line Driver with TRI-STATE Outputs74ABT1624416-BitBuffer/LineDriverwithTRI-STATEOutputsSeptember199574ABT1624416-BitBuffer/LineDriver ..
74ABT16244ADGGRG4 ,16-Bit Buffers/Drivers With 3-State Outputs 48-TSSOP -40 to 85SCBS073H–SEPTEMBER 1991–REVISED AUGUST 2005(1)Recommended Operating ConditionsSN54ABT16244 SN74ABT1 ..
74ABT16244CMTD ,16-Bit Buffer/Line Driver with 3-STATE OutputsFunctional DescriptionThe ABT16244 contains sixteen non-inverting buffers with Inputs Outputs3-STAT ..
74ABT16244CMTDX ,16-Bit Buffer/Line Driver with 3-STATE OutputsFeaturesThe ABT16244 contains sixteen non-inverting buffers with

74ABT16244
16-Bit Buffer/Line Driver with TRI-STATE Outputs
TL/F/10985
74ABT16244
16-Bit
Buffer/Line
Driver
with
TRI-STATE
Outputs
September 1995
74ABT16244 16-Bit Buffer/
Line Driver with TRI-STATEÉ Outputs
General Description
The ’ABT16244 contains sixteen non-inverting buffers with
TRI-STATE outputs designedtobe employedasa memory
and address driver, clockdriver,orbusoriented transmitter/
receiver. The deviceis nibble controlled. Individual TRI-
STATE control inputscanbe shorted togetherfor 8-bitor
16-bit operation.
Features Separate control logicfor each nibble 16-bit versionofthe ’ABT244 Outputs sink capabilityof64 mA, source capabilityofmA Guaranteed output skew Guaranteed multiple output switching specifications Output switching specifiedfor both50pF and 250pF
loads Guaranteed simultaneous switching noise leveland
dynamic threshold performance Guaranteed latchup protection High impedance glitch free bus loading during entire
powerupand power down cycle Non-destructivehot insertion capability
Commercial Package Package DescriptionNumber
74ABT16244CSSC (Note1) MS48A 48-Lead (0.300× Wide) Molded Shrink Small Outline,JEDEC(SSOP)
74ABT16244CMTD (Notes1,2) MTD48 48-Lead Molded Thin ShrinkSmallOutline, JEDEC (TSSOP)
Note1: Devicesalso availablein13×reel.Use suffixe SSCXand MTDX.
Note2: Contact factoryfor package availability.
Logic Symbol
TL/F/10985–1
Pin Description
PinNames Description
OEn Output EnableInputs (ActiveLow)
I0–I15 Inputs
O0–O15 Outputs
Connection Diagram
PinAssignmentfor SSOP
TL/F/10985–2
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
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