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5962-8856501CA
Very Low Noise Quad Operational Amplifier
REV. B
Very Low Noise Quad
Operational Amplifier
FEATURES
Very Low-Noise, 5 nV/÷Hz @ 1 kHz Max
Excellent Input Offset Voltage, 0.4 mV Max
Low Offset Voltage Drift, 2 �V/�C Max
Very High Gain, 1000 V/mV Min
Outstanding CMR, 110 dB Min
Slew Rate, 2 V/�s Typ
Gain-Bandwidth Product, 6 MHz Typ
Industry Standard Quad Pinouts
Available in Die Form
GENERAL DESCRIPTIONThe OP470 is a high-performance monolithic quad operational
amplifier with exceptionally low voltage noise, 5 nV/÷Hz at
1 kHz max, offering comparable performance to ADI’s industry
standard OP27.
The OP470 features an input offset voltage below 0.4 mV,
excellent for a quad op amp, and an offset drift under 2 mV/∞C,
guaranteed over the full military temperature range. Open loop
gain of the OP470 is over 1,000,000 into a 10 kW load ensuring
excellent gain accuracy and linearity, even in high gain applica-
tions. Input bias current is under 25 nA, which reduces errors
due to signal source resistance. The OP470’s CMR of over 110
dB and PSRR of less than 1.8 mV/V significantly reduce errors
due to ground noise and power supply fluctuations. Power
consumption of the quad OP470 is half that of four OP27s, a
significant advantage for power conscious applications. The
OP470 is unity-gain stable with a gain bandwidth product of
6 MHz and a slew rate of 2 V/ms.
PIN CONNECTIONS
14-Lead Hermetic DIP
(Y-Suffix)
14-Lead Plastic DIP
(P-Suffix)
16-Lead SOIC Package
(S-Suffix)
SIMPLIFIED SCHEMATIC
–INThe OP470 offers excellent amplifier matching which is impor-
tant for applications such as multiple gain blocks, low noise
instrumentation amplifiers, quad buffers, and low noise active
filters.
The OP470 conforms to the industry standard 14-lead DIP
pinout. It is pin compatible with the LM148/149, HA4741,
HA5104, and RM4156 quad op amps and can be used to up-
grade systems using these devices.
For higher speed applications, the OP471, with a slew rate of 8
V/ms, is recommended.
OP470–SPECIFICATIONSNOTES
ELECTRICAL CHARACTERISTICS(at VS = �15 V, TA = 25�C, unless otherwise noted.)
OP470*Guaranteed by CMR test
(at VS = �15 V, –55�C £ TA £ 125�C for OP470A, unless otherwise noted.)ELECTRICAL CHARACTERISTICS
(at VS = �15 V, –25�C £ TA £ 85�C for OP470E/OP470EF, –40�C £ TA £ 85�C for OP470G,
unless otherwise noted.)ELECTRICAL CHARACTERISTICS
OP470–SPECIFICATIONSNOTE
*Guaranteed by CMR test
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaran-
teed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
(at VS = �15 V, 25�C, unless otherwise noted.)WAFER TEST LIMITS
ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . .±1.0 V
Differential Input Current2 . . . . . . . . . . . . . . . . . . . .±25 mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous
Storage Temperature Range
P, Y Package . . . . . . . . . . . . . . . . . . . . . .–65∞C to +150∞C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . .300∞C
Junction Temperature (Tj) . . . . . . . . . . . . .–65∞C to +150∞C
Operating Temperature Range
OP470A . . . . . . . . . . . . . . . . . . . . . . . . .–55∞C to +125∞C
OP470E, OP470F . . . . . . . . . . . . . . . . . . .–25∞C to +85∞C
OP470G . . . . . . . . . . . . . . . . . . . . . . . . . .–40∞C to +85∞C
–IN A
OUT A
OUT D
–IN D
+IN AV++IN B
–IN B
OUT B
OUT C
–IN C+IN CV–+IN D
DIE SIZE 0.163 � 0.106 INCH, 17,278 SQ. mm
(4.14 � 2.69 mm, 11.14 SQ. mm) Figure 1. Dice Characteristics
NOTES
1Absolute Maximum Ratings apply to both DICE and packaged parts, unless
otherwise noted.
2The OP470’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise performance. If differential
voltage exceeds ±1.0 V, the input current should be limited to ±25 mA.
3�JA is specified for worst case mounting conditions, i.e., �JA is specified for device
in socket for TO, CerDIP, PDIP, packages; �JA is specified for device soldered to
printed circuit board for SOIC packages.
ORDERING GUIDE*Not for new design; obsolete April 2002.
For military processed devices, please refer to the standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
*Not for new designs; obsolete April 2002.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP470 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
