74F00 ,Quad 2-input NAND gate54F/74F00Quad2-InputNANDGateSeptember199554F/74F00Quad2-InputNANDGateGeneralDescription
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74F00SCX ,Quad 2-Input NAND GateGeneral DescriptionThis device contains four independent gates, each of whichperforms the logic NAN ..
74F00SJ ,Quad 2-Input NAND GateGeneral DescriptionThis device contains four independent gates, each of whichperforms the logic NAN ..
74F00SJX ,Quad 2-Input NAND GateGeneral DescriptionThis device contains four independent gates, each of whichperforms the logic NAN ..
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74HCT03 ,Quad 2-input NAND gate
74HCT03D ,Quad 2-input NAND gateGENERAL DESCRIPTIONOR-tied output
74HCT03N ,Quad 2-input NAND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nY ..
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54F00-74F00
Quad 2-Input NAND Gate
TL/F/9454
54F/74F00
Quad
2-Input
NAND
Gate
September 1995
54F/74F00
Quad 2-Input NAND Gate
General Description
This device containsfour independent gates, eachof which
performsthe logic NAND function.
Features Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F00PC N14A 14-Lead (0.300× Wide)Molded Dual-In-Line
54F00DM (Note2) J14A 14-Lead CeramicDual-In-Line
74F00SC (Note1) M14A 14-Lead (0.150× Wide)Molded SmallOutline, JEDEC
74F00SJ (Note1) M14D 14-Lead (0.300× Wide)Molded SmallOutline, EIAJ
54F00FM(Note2) W14B 14-Lead Cerpack
54F00LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note1: Devicesalso availablein13×reel.Use suffixeSCXandSJX.
Note2: Militarygrade device withenvironmentaland burn-in processing.Use suffixe DMQB, FMQBand LMQB.
Logic Symbol
IEEE/IEC
TL/F/9454–3
Connection Diagrams
Pin Assignment
for DIP, SOICand Flatpak
TL/F/9454–2
Pin Assignment
for LCC
TL/F/9454–1
Unit Loading/Fan Out
54F/74F
Pin Names Description U.L. Input IIH/IIL
HIGH/LOW Output IOH/IOL
An,Bn Inputs 1.0/1.0 20 mA/b0.6mA Outputs 50/33.3 b1mA/20mA
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
