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4029B
Presettable Binary/Decade Up/Down Counter
CD4029BC Presettable Binary/Decade Up/Down Counter October 1987 Revised January 1999 CD4029BC Presettable Binary/Decade Up/Down Counter maximum count in the “up” mode or the minimum count in General Description the “down” mode provided the carry input is at logical “0” The CD4029BC is a presettable up/down counter which state. counts in either binary or decade mode depending on the All inputs are protected against static discharge by diode voltage level applied at binary/decade input. When binary/ clamps to both V and V . DD SS decade is at logical “1”, the counter counts in binary, other- wise it counts in decade. Similarly, the counter counts up when the up/down input is at logical “1” and vice versa. Features A logical “1” preset enable signal allows information at the � Wide supply voltage range: 3V to 15V “jam” inputs to preset the counter to any state asynchro- � High noise immunity: 0.45 V (typ.) DD nously with the clock. The counter is advanced one count � Low power TTL compatibility: fan out of 2 driving 74L at the positive-going edge of the clock if the carry in and or 1 driving 74LS preset enable inputs are at logical “0”. Advancement is inhibited when either or both of these two inputs is at logi- � Parallel jam inputs cal “1”. The carry out signal is normally at logical “1” state � Binary or BCD decade up/down counting and goes to logical “0” state when the counter reaches its Ordering Code: Order Number Package Number Package Description CD4029BCWM M16B 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide body CD4029BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4029BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC and SOP Top View © 1999 DS005960.prf
