100315SC ,Low-Skew Quad Clock DriverFeaturesThe 100315 contains four low skew differential drivers,
100315SC
Low-Skew Quad Clock Driver
100315 Low Skew Quad Clock Driver September 1991 Revised November 1999 100315 Low Skew Quad Clock Driver General Description Features The 100315 contains four low skew differential drivers,Low output-to-output skew (≤50 ps) designed for generation of multiple, minimum skew differ-Differential inputs and outputs ential clocks from a single differential input. This device Secondary clock available for system level testing also has the capability to select a secondary single-ended 2000V ESD protection clock source for use in lower frequency system level test- ing. The 100315 is a 300 Series redesign of the 100115Voltage compensated operating range: −4.2V to −5.7V clock driver. Ordering Code: Order Number Package Number Package Descriptions 100315SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Truth Table Pin Descriptions Pin Names Description CLKSEL CLKIN CLKIN TCLK CLK CLK n n Differential Clock Inputs LL H X L H CLKIN, CLKIN LH L X H L Differential Clock Outputs CLK , CLK 1–4 1–4 H X X LLH TCLK Test Clock Input (Note 1) HX X H H L CLKSEL Clock Input Select (Note 1) L = LOW Voltage Level Note 1: TCLK and CLKSEL are single-ended inputs, with internal 50 kΩ H = HIGH Voltage Level pull-down resistors. X = Don't Care © 1999 DS010960
