100315 ,Low-Skew Quad Clock Driver100315Low-SkewQuadClockDriverJuly1992100315Low-SkewQuadClockDriverGeneralDescription
100315 ,Low-Skew Quad Clock Driver
100315SC ,Low-Skew Quad Clock DriverFeaturesThe 100315 contains four low skew differential drivers,
100315
Low-Skew Quad Clock Driver
TL/F/10960
Low-Skew
Quad
Clock
Driver
July 1992
Low-Skew Quad Clock Driver
General Description
The 100315 containsfourlow skew differential drivers,de-
signedfor generationof multiple, minimum skew differential
clocks froma single differential input. This device alsohas
the capabilityto selecta secondary single-ended clock
sourceforusein lower frequency system level testing.The
100315isa300 Series redesignofthe 100115 clock driver.
Features Low outputto output skew (s50ps) Differential inputsand outputs Small outline package (SOIC) Secondary clock availablefor system level testing 2000V ESD protection Voltage compensated operating range: b4.2Vto b5.7V Militaryand industrial grades available
Logic Diagram
TL/F/10960–1
Connection Diagram
SOICand
Flatpack
TL/F/10960–2
Pin Names Description
CLKIN,CLKIN DifferentialClock Inputs
CLK1–4, CLK1–4 DifferentialClock Outputs
TCLK TestClock Input²
CLKSEL ClockInput Select²
²TCLKand CLKSELare single-ended inputs,with internal50kX pulldown
resistors.
Truth Table
CLKSEL CLKIN CLKIN TCLK CLKN CLKN H X L H L X H L X L L H X H H Le LowVoltage Levele HighVoltage Levele Don’tCare
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
