mc14569B ,Programmable Divide-By-N Dual 4-Bit Binary/BCD Down CounterELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎ – 55C 25C 125CV VDDCharacteristic ..
MC14569B ,Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter3MC14569BÎÎÎÎÎ SWITCHING CHARACTERISTICS (C = 50 pF, T = 25C)L AAll TypesÎÎÎÎÎV VDDCharacteristic ..
MC14569BCL ,Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter**SEMICONDUCTOR TECHNICAL DATA ** **!**#**L SUFFIX* ** ** **#*CERAMICCASE 620**"* ** *The MC14569B ..
MC14569BCL ,Programmable Divide-By-N Dual 4-Bit Binary/BCD Down CounterMAXIMUM RATINGS* (Voltages Referenced to V ) SSSymbol Parameter Value UnitV DC Supply Voltage – 0.5 ..
MC14569BCP ,Programmable Divide-By-N Dual 4-Bit Binary/BCD Down CounterMAXIMUM RATINGS* (Voltages Referenced to V ) SSSymbol Parameter Value UnitV DC Supply Voltage – 0.5 ..
MC14569BDW ,Programmable Divide-By-N Dual 4-Bit Binary/BCD Down CounterMaximum ratings applied to the device are individual stress limit values (notnormal operating condi ..
MC74AC377DWR2 ,Octal D Flip-Flop with Clock Enablethe Clock Enable (CE) is LOW. The register is fully edge-triggered.The state of each D input, one s ..
MC74AC377N ,OCTAL D FLIP-FLOP WITH CLOCK ENABLEMAXIMUM RATINGS*Symbol Parameter Value UnitV DC Supply Voltage (Referenced to GND) –0.5 to +7.0 VCC ..
MC74AC377N ,OCTAL D FLIP-FLOP WITH CLOCK ENABLELOGIC DIAGRAMD D D D D D D D0 1 2 3 4 5 6 7CED Q D Q D Q D Q D Q D Q D Q D QCP CP CP CP CP CP CP CP ..
MC74AC377N ,OCTAL D FLIP-FLOP WITH CLOCK ENABLE* ** * OCTAL DFLIP-FLOP WITH* ** CLOCK ENABLEThe MC74AC377/74ACT377 has eight edge-triggered, D-ty ..
MC74AC4040M ,12-Stage Binary Ripple Counter * 12-STAGEBINARY RIPPLEThe MC74AC4040 consists of 12 master-slave flip-flops. The output of each ..
MC74AC4040N ,12-Stage Binary Ripple Counterhttp://onsemi.com2MC74AC4040DC CHARACTERISTICS (unless otherwise specified)Symbol Parameter Value U ..
mc14569B-MC14569BDW
Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter
MC14569B
Programmable Divide-By-N
Dual 4-Bit Binary/BCD
Down Counter
The MC14569B is a programmable divide−by−N dual 4−bit binary
or BCD down counter constructed with MOS P−Channel and
N−Channel enhancement mode devices (complementary MOS) in a
monolithic structure.
This device has been designed for use with the MC14568B phase
comparator/counter in frequency synthesizers, phase−locked loops,
and other frequency division applications requiring low power
dissipation and/or high noise immunity.
Features Speed−up Circuitry for Zero Detection Each 4−Bit Counter Can Divide Independently in BCD or Binary Mode Can be Cascaded With MC14526B for Frequency Synthesizer
Applications All Outputs are Buffered Schmitt Triggered Clock Conditioning Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/�C From 65�C To 125�C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS � (Vin or Vout) � VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
