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WS57C71C-35-WS57C71C-35J-WS57C71C-35T-WS57C71C-45D-WS57C71C-45T-WS57C71C-55D-WS57C71C-55TI-WS57C71C-70T
HIGH SPEED 32K x 8 CMOS PROM/RPROM
PRODUCT SELECTION GUIDE
HIGH SPEED 32K x 8 CMOS PROM/RPROM
KEY FEATURES Ultra-Fast Access Time • Immune to Latch-UP— 35 ns — Up to 200 mA
• Low Power Consumption • ESD Protection Exceeds 2000V Fast Programming • Available in 300 Mil DIP and PLDCC
GENERAL DESCRIPTIONThe WS57C71C is a High Performance 256K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology and utilizes WSI's patented self-aligned split gate
EPROM cell.
The industry standard PROM pin configuration of the WS57C71C provides an easy upgrade path from a 16K x 8
device.
This RPROM is capable of operating at speeds as fast as 35 ns address access time, which enables it to be used
directly with today's fast microprocessors and DSP processors without introducing any wait states. All inputs and
outputs are TTL compatible. The WS57C71C is a low power device even when operated at its fastest speed. The
DIP version is packaged in a 300 mil wide DIP package saving board space for the user.
PIN CONFIGURATION
BLOCK DIAGRAM
WS57C71C
OPERATING RANGE
ABSOLUTE MAXIMUM RATINGS*Storage Temperature............................–65° to + 150°C
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7VPP with Respect to Ground...................–0.6V to + 13V
ESD Protection..................................................>2000V
*NOTICE:Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
MODE SELECTION
NOTES: 1. CMOS inputs: GND ± 0.3V or VCC± 0.3V. TTL inputs: VIL≤ 0.8V, VIH‡ 2.0V. These are absolute voltages with respect to device ground pin and include all overshoots due to system and/or tester noise.
Do not attempt to test these values without suitable equipment.
DC READ CHARACTERISTICS Over Operating Range. (See Above)
WS57C71C
AC READ CHARACTERISTICS Over Operating Range. (See Above)
*Sampled, Not 100% Tested.
AC READ TIMING DIAGRAM
WS57C71C
CAPACITANCE(4)TA = 25°C, f = 1 MHz
A.C. TESTING INPUT/OUTPUT WAVEFORMTEST LOAD (High Impedance Test Systems)
NOTE:6. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters.
A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between VCC and ground is recommended.
Inadequate decoupling may result in access time degradation or other transient performance failures.
NOTES:4. This parameter is only sampled and is not 100% tested.
5.Typical values are for TA = 25°C and nominal supply voltages.
WS57C71C
WS57C71C
PROGRAMMING INFORMA TION
DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
