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WS57C256F-35D-WS57C256F-35T-WS57C256F-45D-WS57C256F-45T-WS57C256F-55D-WS57C256F-55DM-WS57C256F-55L-WS57C256F-55T-WS57C256F-70D-WS57C256F-70T
HIGH SPEED 32K x 8 CMOS EPROM
PIN CONFIGURA TION
HIGH SPEED 32K x 8 CMOS EPROM
KEY FEATURES Fast Access Time • Immune to Latch-UP— t ACC = 35 ns — Up to 200 mA
— tCE = 35 ns
• ESD Protection Exceeds 2000 Volts Low Power Consumption • Available in 300 Mil DIP and PLDCC— 200 µA Standby ICC
• DESC SMD No. 5962-86063
GENERAL DESCRIPTIONThe WS57C256F is a High Performance 32K x 8 UV Erasable EPROM. It is manufactured using an advanced
CMOS process technology enabling it to operate at speeds as fast as 35 ns Address Access Time (t ACC ) and 35 ns
Chip Enable Time (tCE ). It was designed utilizing WSI's patented self-aligned split gate EPROM cell, resulting in a
low power device with a very cost effective die size. The low standby power capability of this 256 K product (200 µA
in a CMOS interface environment) is especially attractive.
This product, with its high speed capability, is particularly appropriate for use with today's fast DSP processors and
high-clock-rate Microprocessors. The WS57C256F's 35 ns speed enables these advanced processors to operate
without introducing any undesirable wait states. The WS57C256F is also ideal for use in modem applications, and is
recommended for use in these applications by the leading modem chip set manufacturer.
The WS57C256F is available in a variety of package types including the space saving 300 Mil DIP, the surface
mount PLDCC, and other windowed and non-windowed options. And its standard JEDEC EPROM pinouts provide
for automatic upgrade density paths for current 64K and 128K EPROM users.
MODE SELECTION
NOTES: X can be VIL or VIH. 4. Manufacturer Signature.VIH = VPP = 12.75 ± 0.25 V. 5. Device Signature. A1 – A8, A10 – A14 = VIL.
PRODUCT SELECTION GUIDE
DC READ CHARACTERISTICS Over Operating Range with VPP = VCC
AC READ CHARACTERISTICS Over Operating Range. with VPP = VCC
OPERATING RANGE
WS57C256F
ABSOLUTE MAXIMUM RATINGS*Storage Temperature............................–65° to + 150°C
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7VPP and A9 with Respect to Ground ......–0.6V to + 14V
ESD Protection..................................................>2000V
NOTES: 1. CMOS inputs: GND ± 0.3V or VCC± 0.3V. 4. These are absolute voltages with respect to device ground pin and TTL inputs: VIL≤ 0.8V, VIH‡ 2.0V. include all overshoots due to system and/or tester noise. Add 3 mA/MHz for A.C. power component. Do not attempt to test these values without suitable equipment.
WS57C256F
CAPACITANCE(5)TA = 25°C, f = 1 MHz
A.C. TESTING INPUT/OUTPUT WAVEFORMTEST LOAD (High Impedance Test Systems)
NOTES:5. This parameter is only sampled and is not 100% tested.
6. Typical values are for TA = 25°C and nominal supply voltages.
WS57C256F
PROGRAMMING INFORMA TION
DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
PROGRAMMING WAVEFORM
ORDERING INFORMATION
WS57C256F
NOTE:11. The actual part marking will not include the initials "WS."
*SMD product. See section 4 for DESC SMD number.
The WS57C256F is programmed using Algorithm D shown on page 5-9.
When using Data I/O programmers, algorithm 57C256FB is recommended for use with the
WS57C256F for best programming results.
This datasheet has been :
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Datasheets for electronic components.
