VSP2232Y/2K ,12-Bit, 36Msps CCD Signal Processor for Digital Cameras4-Nov-2016PACKAGING INFORMATIONOrderable Device Status Package Type Package Pins Package Eco Plan L ..
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VSP2232Y-VSP2232Y/2K
12-Bit, 36Msps CCD Signal Processor for Digital Cameras
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SLAS320 − MAY 2001
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FEATURES CCD Signal Processing
− Correlated Double Sampling (CDS)
− Programmable Black Level Clamping Programmable Gain Amplifier (PGA)
− −6-dB to 42-dB Gain Ranging 10-Bit Digital Data Output
− Up to 36-MHz Conversion Rate
− No Missing Codes 76-dB Signal-to-Noise Ratio Portable Operation
− Low Voltage: 2.7 V to 3.6 V
− Low Power: 130 mW (typ) at 3.0 V
− Standby Mode: 6 mW DESCRIPTIONThe VSP2232 is a complete mixed-signal processing IC
for digital cameras that provides signal conditioning and
analog-to-digital conversion for the output of a CCD
array. The primary CCD channel provides correlated
double sampling (CDS) to extract the video information
from the pixels, a −6-dB to 42-dB gain with digital control
for varying illumination conditions, and black level
clamping for an accurate black level reference.
Input signal clamping and offset correction of the input
CDS is also performed. The stable gain control is linear
in dB. Additionally, the black level is quickly recovered
after gain change.
The VSP2232Y is pin-to-pin compatible with the
VSP2262Y (12-bit 20 MHz) one-chip product.
The VSP2232Y is available in a 48-pin LQFP package
and operates from a single 3-V/3.3-V supply.
VSP2232 block diagram
−6 to 42 dB
Analog-to-Digital
Converter
12-Bit
Digital
Output
CCD
Output
Signal
B(0−11)
CLPDM SHP SHD SLOAD SCLK SDATA RESET ADCCK DRVDD VCC
GNDADRVGNDREFPCMREFNBYPMBYPBYPP2CPLOBCOBPBLK and use in critical applications of
Not Recommended For New Designs
