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VNQ830PEP-E |VNQ830PEPESTN/a500avaiQUAD CHANNEL HIGH SIDE DRIVER


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VNQ830PEP-E
QUAD CHANNEL HIGH SIDE DRIVER
VNQ830PEP-E
QUAD CHANNEL HIGH SIDE DRIVER
Table 1. General Features

(*) Per channel
■ CMOS COMPATIBLE INPUTS
■ OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ LOSS OF GROUND PROTECTION
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (**) IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
DESCRIPTION

The VNQ830PEP-E is a monolithic device
designed in STMicroelectronics VIPower M0-3
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Figure 1. Package

Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects open
load condition both in on and off state. Output
shorted to VCC is detected in the off state.Device
automatically turns off in case of ground pin
disconnection.
Table 2. Order Codes

Note: (**) See application schematic at page 9.
VNQ830PEP-E
Figure 2. Block Diagram
Figure 3. Current and Voltage Conventions
VNQ830PEP-E
Figure 4. Configuration Diagram (Top View) & Suggested Connections For Unused and N.C. Pins
Table 3. Absolute Maximum Ratings
Table 4. Thermal Data

Note:1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial
air flow.
Note:2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial
air flow.
VNQ830PEP-E
ELECTRICAL CHARACTERISTICS (8VTable 5. Power Output

Note: (**) Per each channel
Table 6. Switching (VCC=13V)
VNQ830PEP-E
ELECTRICAL CHARACTERISTICS (continued)
Table 7. Logic Input
Table 8. Openload Detection
Figure 5.
VNQ830PEP-E
ELECTRICAL CHARACTERISTICS (continued)
Table 9. VCC- Output Diode
Table 10. Status Pin
Table 11. Protections (Per each channel) (see note 2)

Note:3. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles
VNQ830PEP-E
Table 12. Truth Table
Figure 6. Switching Time Waveforms
VNQ830PEP-E
Table 13. Electrical Transient Requirements On VCC Pin
VNQ830PEP-E
Figure 7. Application Schematic
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY

Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / IS(on)max.
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2 /RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the If
the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
LOAD DUMP PROTECTION

Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
VNQ830PEP-E
OPEN LOAD DETECTION IN OFF STATE

Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is
pulled high (up to several mA), the pull-up resistor RPU
should be connected to a supply that is switched OFF
when the module is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
Figure 8. Open Load detection in off state
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