VNS1NV0413TR ,OMNIFET II: FULLY AUTOPROTECTED POWER MOSFETBLOCK DIAGRAMDRAIN2OvervoltageClampINPUTGate1Control LinearCurrentOverLimiterTemperature 3SOURCEFC0 ..
VNS1NV04D ,"OMNIFET II": FULLY AUTOPROTECTED POWER MOSFETFEATURES - OVERTEMPERATURE AND SHORT CIRCUITPROTECTION: these are based on sensing theDuring normal ..
VNS1NV04D13TR ,OMNIFET II: FULLY AUTOPROTECTED POWER MOSFETFEATURES - OVERTEMPERATURE AND SHORT CIRCUITPROTECTION: these are based on sensing theDuring normal ..
VNS1NV04DPTR-E ,OMNIFET II :FULLY AUTOPROTECTED POWER MOSFETBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 5Figure 3. ..
VNS3NV04D ,"OMNIFET II": FULLY AUTOPROTECTED POWER MOSFETFEATURES - OVERTEMPERATURE AND SHORT CIRCUITPROTECTION: these are based on sensing theDuring normal ..
VNS3NV04D13TR ,OMNIFET II: FULLY AUTOPROTECTED POWER MOSFETFEATURES - OVERTEMPERATURE AND SHORT CIRCUITPROTECTION: these are based on sensing theDuring normal ..
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VNN1NV0413TR-VNS1NV0413TR
OMNIFET II: FULLY AUTOPROTECTED POWER MOSFET
/erT/,'
VND1NVO4
VNN1NV04 I VNS1NV04
"OMNIFET ll":
FULLY AUTOPROTECTED POWER MOSFET
TYPE RDS(on) llim Vclamp
VND1NV04 2 r r " r
VNN1NVO4 250 m9 1.7A 40V _
VNS1NV04 Citg 1 2 'tttttt
. LINEAR CURRENT LIMITATION SOT-223 SO-8
. THERMAL SHUT DOWN _
. SHORT CIRCUIT PROTECTION @111
. INTEGRATED CLAMP To 3
. LOW CURRENT DRAWN FROM INPUT PIN TO 252 J,,,,
. DIAGNOSTIC FEEDBACK THROUGH INPUT - ( )
. ESD PROTECTION ORDER CODES:
. DIRECT ACCESS TO THE GATE OF THE TO-252 (DPAK) VND1NVO4
POWER MOSFET (ANALOG DRIVING) SOT-223 VNN1NVO4
. COMPATIBLE WITH STANDARD POWER SO-8 VNSINV04
MOSFET
DESCRIPTION
The VND1NV04, VNN1NVO4, VNS1NV04 are
monolithic devices designed in
STMicroelectronics VIPower MO-3 Technology,
intended for replacement of standard Power
BLOCK DIAGRAM
MOSFETS from DC up to 50KHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Overvoltage
‘ Clamp ‘
INPUT ‘#
Gate l T
E Control _l,l',"-dA'-
Linear
Current
- Over Limiter
Temperature
SOURCE
FC01000
February 2003
VND1NVO4 I VNN1NV04 I VNS1NV04
ABSOLUTE MAXIMUM RATING
S mbol Parameter Value Unit
y SOT-223 so-s DPAK
VDS Drain-source Voltage (1hN=0V) Internally Clamped V
VIN Input Voltage Internally Clamped V
IN Input Current +/-20 mA
RIN MIN Minimum Input Series Impedance 330 Q
ID Drain Current Internally Limited A
IR Reverse DC Output Current -3 A
VESD1 Electrostatic Discharge (R=1.5KQ, C=100pF) 4000 V
Electrostatic Discharge on output pin only
VESD2 (R=33OQ, C=150pF) 16500 V
Ptot Total Dissipation at Tc=25°C 7 l 8.3 l 35 w
T, Operating Junction Temperature Internally limited "C
Tc Case Operating Temperature Internally limited 'C
Tstg Storage Temperature -55 to 150 ''C
CONNECTION DIAGRAM (TOP VIEW)
SO-8 Package (*)
SOURCE , 1 U 8 [] DRAIN
SOURCE C J DRAIN
SOURCE E J DRAIN
INPUT E 4 5 J DRAIN
C) For the pins configuration related to SOT-223 and DPAK see outline at page 1.
CURRENT AND VOLTAGE CONVENTIONS
IIN RIN
—:!—EJ INPUT
SOURCE
