VND830PEP-E-VND830PEPTR-E Fast Delivery |IC PHOENIX CO.,LIMITED

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VND830PEP-E-VND830PEPTR-E
DOUBLE CHANNEL HIGH SIDE DRIVER
VND830PEP-E
DOUBLE CHANNEL HIGH SIDE DRIVER
Table 1. General Features
(*) Per each channel
■ CMOS COMPATIBLE INPUTS
■ OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (**)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
DESCRIPTION
The VND830PEP-E is a monolithic device
designed in STMicroelectronics VIPower M0-3
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Figure 1. Package
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects open
load condition both in on and off state. Output
shorted to VCC is detected in the off state. Device
automatically turns off in case of ground pin
disconnection.
Table 2. Order Codes
Note: (**) See application schematic at page 9
VND830PEP-E
Figure 2. Block Diagram
Table 3. Absolute Maximum Ratings
VND830PEP-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
Figure 4. Current and Voltage Conventions
Table 4. Thermal Data
Note: (*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins.
Note: (**) When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35µm thick) connected to all VCC pins.
VND830PEP-E
ELECTRICAL CHARACTERISTICS (8V
(Per each channel)
Table 5. Power Outputs
Table 6. Switching (VCC =13V)
Table 7. VCC - Output Diode
Table 8. Status Pin
VND830PEP-E
ELECTRICAL CHARACTERISTICS (continued)
Table 9. Logic Input
Table 10. Protections (See note 1)
Note:1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
Table 11. Openload Detection
VND830PEP-E
Figure 5.
Figure 6. Switching time Waveforms
VND830PEP-E
Table 12. Truth Table
Table 13. Electrical Transient Requirements on VCC Pin
VND830PEP-E
Figure 7. Waveforms
VND830PEP-E
Figure 8. Application Schematic
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2 /RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.

Partno	Mfg	Dc	Qty	Available	Descript
VND830PEP-E \|VND830PEPE	ST	N/a	348	avai	DOUBLE CHANNEL HIGH SIDE DRIVER
VND830PEPTR-E \|VND830PEPTRE	ST	N/a	180	avai	DOUBLE CHANNEL HIGH SIDE DRIVER