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Partno Mfg Dc Qty AvailableDescript
VND5E050K-E |VND5E050KESTN/a3028avaiDouble channel high side driver for automotive applications
VND5E050KTR-E |VND5E050KTRESTN/a2501avaiDouble channel high side driver for automotive applications


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VND5E050K-E-VND5E050KTR-E
Double channel high side driver for automotive applications

September 2013 Doc ID 14472 Rev 4 1/40
VND5E050J-EVND5E050K-E

Double channel high side driver for automotive applications
Features
General Inrush current active management by
power limitation Very low standby current 3.0V CMOS compatible inputs Optimized electromagnetic emissions Very low electromagnetic susceptibility In compliance with the 2002/95/EC
european directive Diagnostic functions Open Drain status output On-state open-load detection Off-state open-load detection Output short to Vcc detection Overload and short to ground (power
limitation) indication Thermal shutdown indication Protections Undervoltage shutdown Overvoltage clamp Load current limitation Self limiting of fast thermal transients Protection against loss of ground and loss
of VCC Over temperature shutdown with auto
restart (thermal shutdown) Reverse battery protected (see Figure 32) Electrostatic discharge protection
Applications
All types of resistive, inductive and capacitive
loads
Description

The VND5E050J-E and VND5E050K-E are
double channel high-side drivers manufactured in
the ST proprietary VIPower M0-5 technology
and housed in the tiny PowerSSO-12 and
PowerSSO-24 packages.
The VND5E050J-E and VND5E050K-E are
designed to drive automotive grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS-compatible interface with any
microcontroller.
The devices integrate advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over temperature shut-off with
auto-restart and over-voltage active clamp.
A dedicated active low digital status pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground, over temperature indication, short-circuit
to VCC diagnosis and on & off-state open-load
detection.
The diagnostic feedback of the whole device can
be disabled by pulling the ST AT_DIS pin up, thus
allowing wired-ORing with other similar devices. Typical value with all loads connected.

Contents VND5E050K-E

2/40 Doc ID 14472 Rev 4
Contents Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.5 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
VND5E050K-E List of tables
Doc ID 14472 Rev 4 3/40

List of tables

Table 1. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC= 13V; Tj= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Status pin (VSD=0V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Openload detection (8VTable 10. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. PowerSSO-12 thermal parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 16. PowerSSO-24 thermal parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 17. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 18. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 20. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

List of figures VND5E050K-E

4/40 Doc ID 14472 Rev 4
List of figures

Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Open-load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Open-load without external pull-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 30. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 31. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 33. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25
Figure 35. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition (one channel on) . . . . . . . . 26
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one channel on) . . . . . 27
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . 27
Figure 39. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 40. Rthj-amb Vs. PCB copper area in open box free air condition (one channel on) . . . . . . . . 29
Figure 41. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 30
Figure 42. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30
Figure 43. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 44. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 45. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 46. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 47. PowerSS0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 48. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
VND5E050K-E Block diagram and pin description
Doc ID 14472 Rev 4 5/40
Block diagram and pin description
Figure 1. Block diagram

Table 1. Pin function

Block diagram and pin description VND5E050K-E

6/40 Doc ID 14472 Rev 4
Figure 2. Configuration diagram (top view)

Table 2. Suggested connections for unused and not connected pins
VND5E050K-E Electrical specifications
Doc ID 14472 Rev 4 7/40

2 Electrical specifications
Figure 3. Current and voltage conventions

Note: VFn = V OUTn - VCC during reverse battery condition.
2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.

Table 3. Absolute maximum ratings

Electrical specifications VND5E050K-E

8/40 Doc ID 14472 Rev 4
2.2 Thermal data



























Table 3. Absolute maximum ratings (continued)
Table 4. Thermal data
VND5E050K-E Electrical specifications
Doc ID 14472 Rev 4 9/40

2.3 Electrical characteristics

Values specified in this section are for 8 Vstated.
.

Table 5. Power section
PowerMOS leakage included. For each channel.
Table 6. Switching (VCC =13V; Tj= 25°C)

Electrical specifications VND5E050K-E

10/40 Doc ID 14472 Rev 4



Table 7. Status pin (VSD=0V)
Table 8. Protections (1)
To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 9. Openload detection (8VVND5E050K-E Electrical specifications
Doc ID 14472 Rev 4 11/40

For each channel.
Table 10. Logic input
Table 9. Openload detection (8V
Electrical specifications VND5E050K-E
VND5E050K-E Electrical specifications
Doc ID 14472 Rev 4 13/40

Figure 6. Switching characteristics

Table 11. Truth table If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge.

Electrical specifications VND5E050K-E

14/40 Doc ID 14472 Rev 4
Table 12. Electrical transient requirements (part 1/3) Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13. Electrical transient requirements (part 2/3)
The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14. Electrical transient requirements (part 3/3)
VND5E050K-E Electrical specifications
Doc ID 14472 Rev 4 15/40

2.4 Waveforms
Figure 7. Normal operation


Figure 8. Undervoltage shutdown

Electrical specifications VND5E050K-E

16/40 Doc ID 14472 Rev 4
Figure 9. Overload or Short to GND


Figure 10. Intermittent Overload
VND5E050K-E Electrical specifications
Doc ID 14472 Rev 4 17/40

Figure 11. Open-load with external pull-up


Figure 12. Open-load without external pull-up

Electrical specifications VND5E050K-E

18/40 Doc ID 14472 Rev 4
Figure 13. Short to VCC


Figure 14. T evolution in overload or short to GND
VND5E050K-E Electrical specifications
2.5 Electrical characteristics curves
Figure 15. Off-state output current Figure 16. High level input current
Figure 17. Input clamp voltage Figure 18. Input high level
Figure 19. Input low level Figure 20. Low level STAT_DIS current
Electrical specifications VND5E050K-E Doc ID 14472 Rev 4
Figure 21. On-state resistance vs T case Figure 22. High level STAT_DIS current
Figure 23. On-state resistance vs VCC Figure 24. Low level input current
Figure 25. ILIM vs Tcase Figure 26. Turn-On voltage slope
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