VND5160JTR-E ,Double channel high side driver for automotive applicationsFeatures Max supply voltage V 41VCCOperating voltage range V 4.5 to 36VCCPowerSSO-12Max on- ..
VND5160JTR-E ,Double channel high side driver for automotive applicationsBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 6Figure 3. ..
VND5E006ASPTR-E ,Double channel high-side driver with analog current sense for automotive applicationsBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 6Figure 3. ..
VND5E012AY-E ,Double channel high side driver with analog current sense for automotive applicationsBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 6Figure 3. ..
VND5E012MY-E ,Double channel high-side driver with analog current sense for automotive applicationsApplicationsOperating voltage range V 4.5 to 28VCC• All types of resistive, inductive and capacitiv ..
VND5E012MYTR-E ,Double channel high-side driver with analog current sense for automotive applicationsBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 6Figure 3. ..
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VND5160JTR-E
Double channel high side driver for automotive applications
September 2013 Rev 6 1/31
VND5160J-EDouble channel high side driver for automotive applications
Features General Inrush current active management by
power limitation Very low stand-by current 3.0V CMOS compatible input Optimized electromagnetic emission Very low electromagnetic susceptibility In compliance with the 2002/95/EC
European directive Diagnostic functions Open drain status output On state open load detection Off state open load detection Thermal shutdown indication Protection Undervoltage shut-down Overvoltage clamp Output stuck to Vcc detection Load current limitation Self limiting of fast thermal transients Protection against loss of ground and loss
of VCC Thermal shut down Reverse battery protection (see Figure 28) Electrostatic discharge protection
Application All types of resistive, inductive and capacitive
loads
DescriptionThe VND5160J-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table).
The device detects open load condition in both
ON and OFF states, when STA T_DIS is left open
or driven low. Output shorted to VCC is detected in
the OFF state.
When STAT_DIS is driven high, the ST ATUS pin is
in a high impedance condition.
Output current limitation protects the device in
overload condition. In case of long duration
overload, the device limits the dissipated power to
safe level up to thermal shut-down intervention.
Thermal shut-down with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
Typical value with all loads connected.
Table 1. Device summary
Contents VND5160J-E2/31
Contents Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 20
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5 Maximum demagnetization energy (VCC= 13.5V) . . . . . . . . . . . . . . . . . 23
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.1 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-12™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VND5160J-E List of tables
3/31
List of tables
Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC= 13V; Tj= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 15. PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of figures VND5160J-E
4/31
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Off state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 17. On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 18. On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 19. Openload On state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Openload Off state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. Turn - On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. Turn - Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. ILIM vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Maximum turn Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
Figure 31. PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 24
Figure 33. PowerSSO-12™ Thermal impedance junction ambient single pulse (one channel ON) . . 25
Figure 34. Thermal fitting model of a double channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25
Figure 35. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VND5160J-E Block diagram and pin description
5/31 Block diagram and pin description
Figure 1. Block diagram
Table 2. Pin functions
Block diagram and pin description VND5160J-E
6/31
Figure 2. Configuration diagram (top view)
Table 3. Suggested connections for unused and N.C. pins Not recommended.
VND5160J-E Electrical specifications
7/31
2 Electrical specifications
Figure 3. Current and voltage conventions
Note: VFn = V OUTn - V CCn during reverse battery condition.
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.
Table 4. Absolute maximum ratings
Electrical specifications VND5160J-E
8/31
2.2 Thermal data
Table 4. Absolute maximum ratings (continued)
Table 5. Thermal data
VND5160J-E Electrical specifications
9/31
2.3 Electrical characteristics
Values specified in this section are for 8Vstated.
.
Table 6. Power section PowerMOS leakage included. For each channel.
Table 7. Switching (VCC =13V; Tj =25°C)
Electrical specifications VND5160J-E
10/31
Table 8. Status pin (VSD=0)
Table 9. Protection(1) To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
VND5160J-E Electrical specifications
11/31
Table 10. Openload detection
Table 11. Logic input
Electrical specifications VND5160J-E
12/31
VND5160J-E Electrical specifications
13/31
Figure 6. Switching characteristics
Table 12. Truth table If the VSD is high, the STATUS pin is in a high impedance. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge.
Electrical specifications VND5160J-E
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Table 13. Electrical transient requirements The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. Valid in case of external load dump clamp: 40V maximum referred to ground.
VND5160J-E Electrical specifications
15/31
Figure 7. Waveforms
Electrical specifications VND5160J-E
2.4 Electrical characteristics curves
Figure 8. Off state output current Figure 9. Input clamp voltage
Figure 10. High level input current Figure 11. Input high level
Figure 12. Input low level Figure 13. Input hysteresis voltage
