VNB35NV04 ,"OMNIFET II": FULLY AUTOPROTECTED POWER MOSFETELECTRICAL CHARACTERISTICS (continued) (T =25°C, unless otherwise specified)jDYNAMICSymbol Paramete ..
VNB49N04 ,"OMNIFET" FULLY AUTOPROTECTED POWER MOSFETFEATURESDuring normal operation, the INPUT pin is junction temperature may reach theelectrically co ..
VND05B ,DOUBLE CHANNEL HIGH SIDE SMART POWER SOLID STATE RELAYELECTRICAL CHARACTERISTICS (8V
VND05BSP ,DOUBLE CHANNEL HIGH SIDE SMART POWER SOLID STATE RELAYVND05BSP®ISO HIGH SIDE SMART POWER SOLID STATE RELAYTYPE V R )I VDSS DS(on OUT CCVND05BSP 40 V 0.2 ..
VND10B ,DOUBLE CHANNEL HIGH SIDE SMART POWER SOLID STATE RELAYABSOLUTE MAXIMUM RATINGSymbol Parameter Value UnitV Drain-Source Breakdown Voltage 40 V(BR)DSSoI Ou ..
VND10BSP ,ISO HIGH SIDE SMART POWER SOLID STATE RELAYBLOCK DIAGRAM1/9March 1998VND10BSP
WE2408 , 2.4GHz Single Chip FM Transceiver
WE9140A , TONE/PULSE SWITCHABLE DIALER WITH REDIAL
WE9140A , TONE/PULSE SWITCHABLE DIALER WITH REDIAL
WE9140G , TONE/PULSE SWITCHABLE DIALER WITH REDIAL
WE9140J , TONE/PULSE SWITCHABLE DIALER WITH REDIAL
WE9142 , 10-MEMORY TONE/PULSE SWITCHABLE DIALER
VNB35NV04-VNP35NV04
"OMNIFET II": FULLY AUTOPROTECTED POWER MOSFET
/erT/,'
VNB35NV04 / VNP35NV04
co VNV35NV04 / VNW35NVO4
"OMNIFET ll":
FULLY AUTOPROTECTED POWER MOSFET
PRELIMINARY DATA
TYPE RDS(on) llim Vclamp
VNB35NV04
VNP NV 4
35 0 10 mg 30 A 40 V
VNV35NV04
VNW35NV04
I LINEAR CURRENT LIMITATION
I THERMAL SHUT DOWN
I SHORT CIRCUIT PROTECTION
I INTEGRATED CLAMP
I LOW CURRENT DRAWN FROM INPUT PIN
I DIAGNOSTIC FEEDBACK THROUGH INPUT
I ESD PROTECTION
I DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
I COMPATIBLE WITH STANDARD POWER
MOSFET
DESCRIPTION
The VNB35NV04, VNP35NV04, VNV35NV04,
VNW35NVO4 are monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
BLOCK DIAGRAM
gii(C," y,"
PowerSO-10TM
"tttis,
TO-247
T0-220
ORDER CODES:
D2PAK VNB35NV04
TO-220 VNP35NV04
PowerSO-10m VNV35NV04
TO-247 VNW35NV04
MOSFETS from DC up to 25KHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Overvoltage
Clamp -_
INPUT I-
Gate l T
E Control “*3
Linear
Current
Over Limiter
Temperature
SOURCE
FC01000
February 2001
VNB35NV04lVNP35NV04lVNVMNV04lVNW36NV04
ABSOLUTE MAXIMUM RATING
S mbol Parameter Value Unit
y PowerSO-10TM DZPAK TO-220 T0-247
VDS Drain-source Voltage (Nhrr=0V) Internally Clamped V
VIN Input Voltage Internally Clamped V
IN Input Current +/-20 mA
RIN MIN Minimum Input Series Impedance 4.7 9
ID Drain Current Internally Limited A
IR Reverse DC Output Current -30 A
VESD1 Electrostatic Discharge (R=1.5KQ, C=100pF) 4000 V
Electrostatic Discharge on output pin only
VESD2 (R=33OQ, C=150pF) 16500 V
Ptot Total Dissipation at Tc=25°C 125 125 125 208 W
T, Operating Junction Temperature Internally limited 'C
Tc Case Operating Temperature Internally limited 'C
Tstg Storage Temperature -55 to 150 "C
CONNECTION DIAGRAM (TOP VIEW)
INPUT SOURCE
INPUT SOURCE
INPUT (L) NO.
INPUT SOURCE
INPUT SOURCE
C) For the pins configuration related to T0-220, TO-247, D2PAK, see outlines at page 1.
CURRENT AND VOLTAGE CONVENTIONS
IIN RIN
"l=l-roiNPtrr
SOURCE
2/15 gr,
