VN750B5-E ,HIGH SIDE DRIVERVN750-E / VN750S-EVN750PT-E / VN750B5-EHIGH SIDE DRIVERTable 1. General
VN750B5-E ,HIGH SIDE DRIVERBlock DiagramVCCOVERVOLTAGEVCCDETECTIONCLAMPUNDERVOLTAGEDETECTIONGNDPower CLAMPDRIVER INPUTOUTPUTLO ..
VN750B5TR-E ,HIGH SIDE DRIVERAbsolute Maximum RatingsValueSymbol Parameter Unit2SO-8 PENTAWATT P PAK PPAKV DC Supply Voltage 41 ..
VN750PT ,HIGH SIDE DRIVERVN750 / VN750S/ VN750PT / VN750-B5®HIGH SIDE DRIVERTYPE R I VDS(on) OUT CCVN750VN750S60 mΩ 6 A 36 V ..
VN750PT-E ,HIGH SIDE DRIVERFeatures Figure 1. PackageType R I VDS(on) OUT CCVN750-EVN750B5-E60 mΩ 6 A 36 VVN750S-EVN750PTSO-8 ..
VN750S ,HIGH SIDE DRIVERBLOCK DIAGRAMVCCOVERVOLTAGEVCCDETECTIONCLAMPUNDERVOLTAGEDETECTIONGNDPower CLAMPDRIVER INPUTOUTPUTLO ..
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VN750B5-E-VN750B5TR-E-VN750PT-E-VN750STR-E
HIGH SIDE DRIVER
1/31October 2004
VN750-E / VN750S-E
VN750PT-E / VN750B5-EHIGH SIDE DRIVER
Rev. 1
Table 1. General Features CMOS COMPATIBLE INPUT ON STATE OPEN LOAD DETECTION OFF STATE OPEN LOAD DETECTION SHORTED LOAD PROTECTION UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN PROTECTION AGAINST LOSS OF GROUND VERY LOW STAND-BY CURRENT REVERSE BATTERY PROTECTION (*) IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
DESCRIPTIONThe VN750-E, VN750S-E, VN750PT-E,
VN750B5-E are a monolithic device designed in
STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Figure 1. PackageActive current limitation combined with thermal
shutdown and automatic restart protect the device
against overload.
The device detects open load condition both is on
and off state. Output shorted to VCC is detected in
the off state. Device automatically turns off in case
of ground pin disconnection.
Table 2. Order CodesNote: (*) See application schematic at page 9.
VN750-E / VN750S-E / VN750PT-E / VN750B5-E2/31
Figure 2. Block Diagram
Table 3. Absolute Maximum Ratings
3/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
Figure 4. Current and Voltage Conventions
Table 4. Thermal Data1 ) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35μm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.2 ) When mounted on a standard single-sided FR-4 board with 2cm2 of Cu (at least 35μm thick) connected to all VCC pins. Horizontal mount-
ing and no artificial air flow.3 ) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35μm thick). Horizontal mounting and no artificial air
flow.4 ) When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35μm thick). Horizontal mounting and no artificial air flow.
VN750-E / VN750S-E / VN750PT-E / VN750B5-E4/31
ELECTRICAL CHARACTERISTICS (8VTable 5. Power
Table 6. Switching (VCC =13V)
Table 7. Input PinNote: (#) See relative diagram
5/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
ELECTRICAL CHARACTERISTICS (continued)
Table 8. VCC - Output Diode
Table 9. Status Pin
Table 10. Protections (see note 1)Note:1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
Table 11. Openload DetectionNote: (#) See relative diagram
VN750-E / VN750S-E / VN750PT-E / VN750B5-E6/31
Figure 5.
Table 12. Truth Table
Figure 6. Switching time Waveforms
7/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Table 13. Electrical Transient Requirements On VCC Pin
VN750-E / VN750S-E / VN750PT-E / VN750B5-E8/31
Figure 7. Waveforms
9/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Figure 8. Application Schematic
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2 /RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
μC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the μC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of μC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of μC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHμC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
VN750-E / VN750S-E / VN750PT-E / VN750B5-E10/31
OPEN LOAD DETECTION IN OFF STATEOff state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL
2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is
pulled high (up to several mA), the pull-up resistor RPU
should be connected to a supply that is switched OFF
when the module is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
Figure 9. Open Load detection in off state
11/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Figure 10. Off State Output Current Figure 11. High Level Input Current
Figure 12. Input Clamp Voltage
Figure 13. Status Low Output Voltage
Figure 14. Status Leakage Current
Figure 15. Status Clamp Voltage
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
12/31
Figure 16. On State Resistance Vs Tcase Figure 17. On State Resistance Vs VCC
Figure 18. Openload On State Detection
Threshold
Figure 19. Input High Level
Figure 20. Openload Off State Voltage
Detection Threshold
Figure 21. Input Low Level
13/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Figure 22. Turn-on Voltage Slope
Figure 23. Overvoltage Shutdown
Figure 24. Input Hysteresis Voltage
Figure 25. Turn-off Voltage Slope
Figure 26. ILIM Vs Tcase
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
14/31
Figure 27. SO-8 Maximum turn off current versus load inductance
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
VIN, IL
Demagnetization Demagnetization Demagnetization
15/31
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Figure 28. PPAK, P2 PAK Maximum turn off current versus load inductance
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
VIN, IL
Demagnetization Demagnetization Demagnetization
VN750-E / VN750S-E / VN750PT-E / VN750B5-E
16/31
SO-8 Thermal Data
Figure 29. SO-8 PC Board
Figure 30. Rthj-amb Vs PCB copper area in open box free air condition
