VN5010AK-E ,Single channel high side switchBlock diagram . . . . 5Figure 2. Connection diagram (top view) . . . . . . . 6Figure 3. ..
VN5010AKTR-E ,Single channel high side switchfeatures ■ All types of resistive, inductive and capacitive – Inrush current active management by p ..
VN5010AKTR-E ,Single channel high side switchElectrical characteristics curves 183 Application information . . . . . 213.1 GND protecti ..
VN5012AK-E ,Single channel high side switchfeaturesApplication– Inrush current active management by ■ All types of resistive, inductive and ca ..
VN5012AKTR-E ,Single channel high side switchBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 6Figure 3. ..
VN5016AJTR-E ,Single channel high side driver with analog current sense for automotive applicationsBlock diagram . . . . 5Figure 2. Configuration diagram (top view) . . . . . 6Figure 3. ..
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VN5010AK-E-VN5010AKTR-E
Single channel high side switch
September 2013 Doc ID 13218 Rev 7 1/31
VN5010AK-EHigh side driver with analog current sense
for automotive applications
Features Main features Inrush current active management by
power limitation Very low standby current 3.0v CMOS compatible input Optimized electromagnetic emission Very low electromagnetic susceptibility In compliance with the 2002/95/EC
European directive Diagnostic functions Proportional load current sense High current sense precision for wide range
currents Current sense disable Thermal shutdown indication Very low current sense leakage Protections Undervoltage shutdown Overvoltage clamp Load current limitation Self limiting of fast thermal transients Protection against loss of ground and loss
of VCC Thermal shutdown
Table 1. Device summary
Contents VN5010AK-E2/31 Doc ID 13218 Rev 7
Contents Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Maximum demagnetization energy (VCC =13.5V) . . . . . . . . . . . . . . . . . . . 23
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.1 PowerSSO-24TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VN5010AK-E List of tables
Doc ID 13218 Rev 7 3/31
List of tables
Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Switching (VCC=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8VTable 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 12. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 13. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 14. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 16. PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of figures VN5010AK-E
4/31 Doc ID 13218 Rev 7
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of Current Sense
(CS enabled)12
Figure 6. IOUT/ISENSE vs IOUT (see Table 10 for details) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Figure 18. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-24TM PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. PowerSSO-24TM thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 25
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24TM . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. PowerSSO-24TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 34. PowerSSO-24TM tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VN5010AK-E Block diagram and pin description
Doc ID 13218 Rev 7 5/31
Block diagram and pin description
Figure 1. Block diagram
Table 2. Pin function
Block diagram and pin description VN5010AK-E
6/31 Doc ID 13218 Rev 7
Figure 2. Connection diagram (top view)
Table 3. Suggested connections for unused and not connected pins Not recommended.
VN5010AK-E Electrical specifications
Doc ID 13218 Rev 7 7/31
2 Electrical specifications
Figure 3. Current and voltage conventions
Note: VFn = VOUT - VCC during reverse battery condition.
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.
Table 4. Absolute maximum ratings
Electrical specifications VN5010AK-E
8/31 Doc ID 13218 Rev 7
2.2 Electrical characteristics
Values specified in this section are for 8 V< VCC < 36 V; -40 °C< Tj < 150 °C, unless
otherwise stated (for each channel).
Table 5. Thermal data
Table 4. Absolute maximum ratings (continued)
Table 6. Power section
VN5010AK-E Electrical specifications
Doc ID 13218 Rev 7 9/31
PowerMOS leakage included.
Table 7. Switching (VCC =13V)
Table 8. Logic input
Table 6. Power section (continued)
Electrical specifications VN5010AK-E
10/31 Doc ID 13218 Rev 7
Table 9. Protections and diagnostics(1) To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 10. Current sense (8VVN5010AK-E Electrical specifications
Doc ID 13218 Rev 7 11/31
Parameter guaranteed by design; it is not tested.
Table 10. Current sense (8V
Electrical specifications VN5010AK-E
12/31 Doc ID 13218 Rev 7
Figure 4. Current sense delay characteristics
Figure 5. Delay response time between rising edge of output current and rising
edge of Current Sense (CS enabled)
VN5010AK-E Electrical specifications
Doc ID 13218 Rev 7 13/31
Figure 6. IOUT/ISENSE vs IOUT (see Table 10 for details)
Figure 7. Maximum current sense ratio drift vs load current
Note: Parameter guaranteed by design; it is not tested.
Electrical specifications VN5010AK-E
14/31 Doc ID 13218 Rev 7
Figure 8. Switching characteristics
Table 11. Truth table If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
VN5010AK-E Electrical specifications
Doc ID 13218 Rev 7 15/31
Figure 9. Output voltage drop limitation
Table 12. Electrical transient requirements (part 1/3)
Table 13. Electrical transient requirements (part 2/3) The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. Valid in case of external load dump clamp: 40V maximum referred to ground.
Electrical specifications VN5010AK-E
16/31 Doc ID 13218 Rev 7
Table 14. Electrical transient requirements (part 3/3)
