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VIPER20B-VIPER20BSP
SMPS PRIMARY I.C.
VIPer20B
VIPer20BSPSMPS PRIMARY I.C.
PRELIMINARY DATASeptember 1999
BLOCK DIAGRAMVDD
OSC
COMP
DRAIN
SOURCE
13V
UVLO
LOGIC
SECURITY
LATCH
PWM
LATCHFFR/SR3
OSCILLATOR
OVERTEMP.
DETECTOR
ERROR
AMPLIFIER_
0.5V+
2μs
delay
300ns
Blanking
CURRENT
AMPLIFIER
ON/OFF
0.5VV/A++
4.5V
FC00490
TYPE VDSS In RDS(on)VIPer20B/SP 400V 1.3A 8.7Ω
FEATURE ADJUSTABLE SWITCHING FREQUENCY UP 200KHZ CURRENT MODE CONTROL SOFT START AND SHUT DOWN CONTROL AUTOMATIC BURST MODE OPERATIONIN
STAND-BY CONDITION ABLE TO MEET
”BLUE ANGEL” NORM (1W TOTAL POWER
CONSUMPTION) INTERNALLY TRIMMED ZENER
REFERENCE UNDERVOLTAGE LOCK-OUT WITH
HYSTERESIS INTEGRATED START-UP SUPPLY AVALANCHE RUGGED OVERTEMPERATUREPROTECTION LOW STAND-BY CURRENT ADJUSTABLE CURRENT LIMITATION
DESCRIPTIONVIPer20B combineson the same silicon chipa
state-of-the-art PWM circuit together with an
optimized high voltage avalanche rugged Vertical
Power MOSFET (400V 1.3A).
Typical applications cover off line power supplies
witha secondary max power capabilityof 30W.It compatible from both primaryor secondary
regulation loop despite using around 50% less
components when compared witha discrete
solution. Burst mode operationis an additional
featureof this device, offering the possibilityto
operate in stand-by mode without extra
components.
PENTAWATT HV Power SO-101/17
ABSOLUTE MAXIMUM RATING
Symbol Parameter Value UnitVDS Continuous Drain-Source Voltage(Tj=25to 125oC) -0.3to 400 V Maximum Current Internally Limited A
VDD Supply Voltage 0to15 V
VOSC Voltage Range Input 0to VDD V
VCOMP Voltage Range Input 0to5 V
ICOMP Maximum Continuous Current ±2mA
Vesd Electrostatic discharge(R= 1.5 KΩC= 100pF) 2000 V
ID(AR) Avalanche Drain-Source Current, Repetitiveor Not-Repetitive
(TC =100oC, Pulse Width LimitedbyTJ max, δ <1%)
TBD A
Ptot Power DissipationatTc=25o C57 W Junction Operating Temperature -40to 140 oC
Tstg Storage Temperature -65to 150 oC
THERMAL DATARthj-case Thermal Resistance Junction-case Max 2.0 o C/W
Rthj-amb. Thermal Resistance Junction-ambient
Max o C/W
CURRENT AND VOLTAGE CONVENTIONS13V
OSC
COMP SOURCE
DRAINVDDVCOMP
VOSC
VDD VDS
ICOMP
IOSC
IDD ID
FC00020
CONNECTION DIAGRAMS (Top View)
PENTAWATT HV PowerSO-10
VIPer20B/ VIPer20BSP2/17
PINS FUNCTIONAL DESCRIPTION
DRAIN PIN:Integrated power MOSFET drain pin.It provides
internal bias current during start-up via an
integrated high voltage current source whichis
switchedoff during normal operation. The device ableto handlean unclamped current duringits
normal operation, assuring self protection against
voltage surges, PCB stray inductance, and
allowinga snubberless operation for low output
power.
SOURCE PIN:Power MOSFET source pin. Primary side circuit
common ground connection.
VDD PIN:This pin provides two functions:It correspondsto the low voltage supplyof the
control partof the circuit.If VDD goes below 8V,
the start-up current sourceis activated and the
output power MOSFETis switchedoff until the
VDD voltage reaches 11V. During this phase,
the internal current consumptionis reduced,
the VDD pinis sourcinga currentof about 1mA
and the COMP pinis shortedto ground. After
that, the current sourceis shut down, and the
device triesto startupby switching again. Thispinis also connectedto the error amplifier, orderto allow primaryas wellas secondary
regulation configurations.In caseof primary
regulation, an internal 13V trimmed reference
voltageis usedto maintain VDDat 13V. For
secondary regulation,a voltage between 8.5V
and 12.5V will be put on VDD pin by
transformer design,in orderto stuck the output the transconductance amplifierto the high
state. The COMP pin behaves asa constant
current source, and can easilybe connectedto
the outputof an optocoupler. Note that any
overvoltage dueto regulation loop failureis still
detectedby the error amplifier through the VDD
voltage, which cannot overpass 13V. The
output voltage will be somewhat higher than
the nominalone, but still under control.
COMP PIN:This pin provides two functions:Itis the outputof the error transconductance
amplifier, and allows for the connectionofa
compensation networkto provide the desired
transfer function of the regulation loop. Its
bandwidth can be easily adjusted to the
needed value with usual componentsvalue. As
stated above, secondary regulation
configurations are also implemented through
the COMP pin. When the COMP voltageis going below 0.5V,
the shut-downof the circuit occurs, witha zero
duty cyclefor the power MOSFET. This feature
canbe usedto switchoff the converter, andis
automatically activated by the regulation loop
(whateveris the configuration)to providea
burst mode operationin case of negligible
output poweror open load condition.
OSC PIN: RT-CT network mustbe connectedon that pin define the switching frequency. Note that
despite the connection of RT to VDD,no
significant frequency change occurs for VDD
varying from 8V to 15V.It provides alsoa
synchronisation capability, when connectedtoan
external frequency source.
ORDERING NUMBERS
PENTAWATT HV PowerSO-10VIPer20B VIPer20BSP
VIPer20B/ VIPer20BSP3/17
ELECTRICAL CHARACTERISTICS (TJ =25oC, VDD=13V, unless otherwise specified)
POWER SECTION
Symbol Parameter Test Conditions Min. Typ. Max. UnitBVDSS Drain-Source Voltage ID =10 mA VCOMP=0V 400 V
IDSS Off-State Drain Current VDS =300V TJ= 125oC
VCOMP =0V
0.6 mA
RDS(on) Static Drain Sourceon
Resistance =0.9A =0.9A TJ= 100oC
7.3 8.7
15.7 Fall Time ID =0.1A Vin =300 V(1)
(see fig.3) ns Rise Time ID =0.9A Vin= 300V (1)
(see fig.3) ns
COSS Output Capacitance VDS =25V 90 pF
(1)On Inductive Load, Clamped.
SUPPLY SECTION
Symbol Parameter Test Conditions Min. Typ. Max. UnitIDDch Start-up Charging
Current
VDD =0to VDDon VDS =70V
(see fig.2) mA
IDD0 Operating Supply
Current
VDD =12V, FSW =0 KHz
(see fig.2) TBD mA
IDD1 Operating Supply
Current
VDD =12V, FSW =100 KHz 13 mA
IDD2 Operating Supply
Current
VDD =12V, FSW =200 KHz 14 mA
VDDoff Undervoltage
Shutdown
(see fig.2) 8 V
VDDon Undervoltage Reset (see fig.2) 11 12 V
VDDhyst Hysteresis Start-up (see fig.2) 2.4 3 V
OSCILLATORSECTION
Symbol Parameter Test Conditions Min. Typ. Max. UnitFSW1 Oscillator Frequency
Initial Accuracy =8.2 KΩ CT =2.4nF
(see fig.7) 100 110 KHz
FSW2 Oscillator Frequency
Total Variation =8.2 KΩ CT =2.4nF
VDD =9 to15V TJ=0to 100oC 100 120 KHz
VOSCih Oscillator Peak Voltage 7.1 V
VOSCil Oscillator Valley
Voltage
3.7 V
VIPer20B/ VIPer20BSP4/17
ELECTRICAL CHARACTERISTICS (continued)
ERROR AMPLIFIERSECTION
Symbol Parameter Test Conditions Min. Typ. Max. UnitVDDreg VDD Regulation Point ICOMP=0 mA (see fig.1) 12.61313.4 V
ΔVDDreg Total Variation TJ=0to 100o C2 %
GBW Unity Gain Bandwidth From Input= VDDto Output= VCOMP
COMP pinis open (see fig.8)
150 KHz
AVOL Open Loop Voltage
Gain
COMP pinis open (see fig.8) TBD 50 dB DC Transconductance VCOMP= 2.5V (see fig.1) TBD 1.5 TBD mA/V
VCOMPLO Output Low Level ICOMP =-400 μAVDD =14V 0.2 V
VCOMPHI Output High Level ICOMP =400 μAVDD =12V 4.5 V
ICOMPLO Output Low Current
Capability
VCOMP =2.5V VDD =14V -600 μA
ICOMPHI Output High Current
Capability
VCOMP =2.5V VDD=12V 600 μA
PWM COMPARATOR SECTION
Symbol Parameter Test Conditions Min. Typ. Max. UnitHID ΔVCOMP/ΔIDpeak VCOMP=1to3V TBD 2.3 TBD V/A
VCOMPoff VCOMP offset IDpeak =10 mA 0.5 V
IDpeak Peak Current Limitation VDD=12V COMP pin open 1.3 TBD A Current Sense Delay turn-off= 0.4A 250 ns Blanking Time 300 ns
SHUTDOWN AND OVERTEMPERATURE SECTION
Symbol Parameter Test Conditions Min. Typ. Max. UnitVCOMPth Restart threshold (see fig.4) 0.5 V
tDISsu Disable Set Up Time (see fig.4) 1.7 5 μs
Ttsd Thermal Shutdown
Temperature
(see fig.6) 140 160 oC
Thyst Thermal Shutdown
Hysteresis
(see fig.6) 34 oC
VIPer20B/ VIPer20BSP5/17
Figure 1:VDD RegulationPoint
ICOMP
ICOMPHI
ICOMPLO
VDDreg
VDD
Slope=in mA/V
FC00150
Figure3: TransitionTime
VDS tr
10%Ipeak
10%VD
90%VD
FC00160
Figure2: Undervoltage Lockout
VDDon
IDDch
IDD0
VDDVDDoff
VDS=70V
Fsw=0
IDD
VDDhyst
FC00170
Figure4: Shut Down Action
VCOMP
VOSC
tDISsu
ENABLE
DISABLE
ENABLE
VCOMPth
FC00060
VIPer20B/ VIPer20BSP6/17
Figure6: Overtemperature Protection
VDD
VCOMP
Ttsd Thyst
VDDon
FC10192
Figure5: Start-upWaveforms
VIPer20B/ VIPer20BSP7/17
Figure7: Oscillator 2 3 5 10 20 30 5030
1,000 (kΩ)
Frequency
(kHz)
Oscillator frequencyvsRt andCt =1.5nF=2.7nF
Ct=4.7nF= 10nF
FC00030FC00030 2 3 5 10 20 30 500.5
0.9 (kΩ)
Dmax
Maximum duty cyclevsRt FC00040
OSC
VDD
~360
CLK
FC00050
ForRT> 1.2 KΩ:SW= 2.3TCT MAX MAX=1− 550T− 150
RecommendedD MAX values:
100KHz:> 80%
200KHz:> 70%
VIPer20B/ VIPer20BSP8/17
Figure8: Error Amplifier Frequency Response
0.001 0.01 0.1 1 10 100 1,000(20)
Frequency (kHz)
Voltage
Gain
(dB)RCOMP=+∞
RCOMP= 270k
RCOMP= 82k
RCOMP= 27k
RCOMP= 12k
FC00200
Figure9: Error Amplifier Phase Response
0.001 0.01 0.1 1 10 100 1,000(50)
Frequency (kHz)
Phase
RCOMP=+∞
RCOMP= 270k
RCOMP= 82k
RCOMP= 27k
RCOMP= 12k
FC00210
VIPer20B/ VIPer20BSP9/17