VIPER20ASP-VIPER20SP Fast Delivery |IC PHOENIX CO.,LIMITED

VIPER20ASP ,SMPS PRIMARY I.C.ELECTRICAL CHARACTERISTICS (T =25 C, V = 13 V, unless otherwise specified)J DDPOWER SECTIONSymbol P ..
VIPER20ASP ,SMPS PRIMARY I.C.FUNCTIONAL DESCRIPTION constant current source, and can easily beconnected to the output of an opto ..
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VIPER20ASPTR-E ,Fixed frequency off line converterapplications cover offline power supplies ■ Low stand-by currentwith a secondary power capability o ..
VIPER20B ,SMPS PRIMARY I.C.FUNCTIONAL DESCRIPTION current source, and can easily be connected tothe output of an optocoupler. ..
VIPER20BSP ,SMPS PRIMARY I.C.ABSOLUTE MAXIMUM RATINGSymbol Parameter Value UnitoV Continuous Drain-Source Voltage (Tj = 25 to 12 ..
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VIPER20ASP-VIPER20SP
SMPS PRIMARY I.C.
VIPer20/SP/DIP
VIPer20A/ASP/ADIP
SMPS PRIMARY I.C.
November 1999
BLOCK DIAGRAM
TYPE VDSS In RDS(on)
VIPer20/SP/DIP 620V 0.5A 16Ω
VIPer20A/ASP/ADIP 700V 0.5A 18Ω
FEATURE ADJUSTABLE SWITCHING FREQUENCY UP 200KHZ CURRENT MODE CONTROL SOFT START AND SHUT DOWN CONTROL AUTOMATIC BURST MODE OPERATIONIN
STAND-BY CONDITION ABLE TO MEET
”BLUE ANGEL” NORM (<1W TOTAL POWER
CONSUMPTION) INTERNALLY TRIMMED ZENER
REFERENCE UNDERVOLTAGE LOCK-OUT WITH
HYSTERESIS INTEGRATED START-UP SUPPLY AVALANCHE RUGGED OVERTEMPERATURE PROTECTION LOW STAND-BY CURRENT ADJUSTABLE CURRENT LIMITATION
DESCRIPTION
VIPer20/20A, made using VIPower M0
Technology, combineson the same silicon chipa
state-of-the-art PWM circuit together with an
optimized high voltage avalanche rugged Vertical
Power MOSFET (620Vor 700V/ 0.5A).
Typical applications cover off line power supplies
witha secondary power capabilityof 10Win wide
range condition and 20Win single rangeor with
doubler configuration.Itis compatible from both
primary or secondary regulation loop despite
using around 50% less components when
compared witha discrete solution. Burst mode
operationis an additional featureof this device,
offering the possibility to operate in stand-by
mode withoutextra components.
PowerSO-10
PENTAWATT HV PENTAWATT HV (022Y)
VDD
OSC
COMP
DRAIN
SOURCE
13V
UVLO
LOGIC
SECURITY
LATCH
PWM
LATCHFFR/SR3
OSCILLATOR
OVERTEMP.
DETECTOR
ERROR
AMPLIFIER_
0.5V+
1.7μs
delay
250ns
Blanking
CURRENT
AMPLIFIER
ON/OFF
0.5V
6V/A++
4.5V
FC00491
DIP-8
1/21
ABSOLUTE MAXIMUM RATING
Symbol Parameter Value Unit
VDS Continuous Drain-Source Voltage (Tj=25to 125oC)
for VIPer20/SP/DIP
for VIPer20A/ASP/ADIP
-0.3to 620
-0.3to 700 Maximum Current Internally Limited A
VDD Supply Voltage 0to15 V
VOSC Voltage Range Input 0to VDD V
VCOMP Voltage Range Input 0to5 V
ICOMP Maximum Continuous Current ±2mA
Vesd Electrostatic discharge(R= 1.5 KΩC= 100pF) 4000 V
ID(AR) Avalanche Drain-Source Current, Repetitiveor Not-Repetitive
(TC= 100oC, Pulse Width LimitedbyTJ max, δ <1%)
for VIPer20/SP
for VIPer20A/ASP/ADIP
Ptot Power DissipationatTc=25o C57 W Junction Operating Temperature Internally Limited oC
Tstg Storage Temperature -65to 150 oC
THERMAL DATA
PENTAWATT PowerSO-10 DIP-8
Rthj-pin 20 o C/W
Rthj-case Thermal Resistance Junction-case Max 2.0 2.0 o C/W
Rthj-amb. Thermal Resistance Ambient-case Max 70 60 35# o C/W
(*) When mounted usingthe minimum recommended pad sizeon FR-4 board.On multylayer PCB
CURRENT AND VOLTAGE CONVENTIONS13V
OSC
COMP SOURCE
DRAINVDD
VCOMP
VOSC
VDD VDS
ICOMP
IOSC
IDD ID
FC00020
CONNECTION DIAGRAMS (Top View)
PENTAWATT HV PENTAWATT HV (022Y) PowerSO-10 DIP-8C
Vdd
SOURCE
COMP
DRAIN
DRAIN
DRAIN
DRAIN
SC10540
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
2/21
PINS FUNCTIONAL DESCRIPTION
DRAIN PIN:
Integrated power MOSFET drain pin.It provides
internal bias current during start-up via an
integrated high voltage current source whichis
switchedoff during normal operation. The device ableto handlean unclamped current duringits
normal operation, assuring self protection against
voltage surges, PCB stray inductance, and
allowinga snubberless operation for low output
power.
SOURCE PIN:
Power MOSFET source pin. Primary side circuit
common ground connection.
VDD PIN:
This pin provides two functions:It correspondsto the low voltage supplyof the
control partof the circuit.If VDD goes below 8V,
the start-up current sourceis activated and the
output power MOSFETis switchedoff until the
VDD voltage reaches 11V. During this phase,
the internal current consumptionis reduced,
the VDD pinis sourcinga currentof about 2mA
and the COMP pinis shortedto ground. After
that, the current sourceis shut down, and the
device triesto startupby switching again. This pin is also connected to the error
amplifier,in orderto allow primary as well as
secondary regulation configurations.In caseof
primary regulation, an internal 13V trimmed
reference voltageis usedto maintain VDDat
13V. For secondary regulation,a voltage
between 8.5V and 12.5V willbe puton VDD pin transformer design,in orderto stuck the
outputof the transconductanceamplifierto the
high state. The COMP pin behaves asa
constant current source, and can easily be
connectedto the outputof an optocoupler.
Note that any overvoltage due to regulation
loop failure is still detected by the error
amplifier through the VDD voltage, which
cannot overpass 13V. The output voltage will somewhat higher than the nominal one, but
still under control.
COMP PIN:
This pin provides two functions:Itis the outputof the error transconductance
amplifier, and allows for the connectionofa
compensation networkto provide the desired
transfer function of the regulation loop. Its
bandwidth can be easily adjusted to the
needed value with usual componentsvalue. As
stated above, secondary regulation
configurations are also implemented through
the COMPpin. When the COMP voltageis going below 0.5V,
the shut-downof the circuit occurs, witha zero
duty cyclefor the power MOSFET. This feature
canbe usedto switchoff the converter, andis
automatically activated by the regulation loop
(whateveris the configuration)to providea
burst mode operationin caseof negligible
output poweror open load condition.
OSC PIN: RT-CT network mustbe connectedon that pin define the switching frequency. Note that
despite the connection of RT to VDD,no
significant frequency change occurs for VDD
varying from 8V to 15V.It provides alsoa
synchronisation capability, when connectedtoan
external frequency source.
ORDERING NUMBERS
PENTAWATT HV PENTAWATT HV (022Y) PowerSO-10 DIP-8
VIPer20
VIPer20A
VIPer20 (022Y)
VIPer20A (022Y)
VIPer20SP
VIPer20ASP
VIPer20DIP
VIPer20ADIP
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
3/21
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
ID(ar) Avalanche Current, Repetitiveor Not-Repetitive
(pulse width limitedbyTj max, δ <1%)
for VIPer20/SP/DIP
for VIPer20A/ASPA/DIP (see fig.12)
E(ar) Single Pulse Avalanche Energy
(startingTj =25oC,ID =ID(ar)) (see fig.12) mJ
ELECTRICAL CHARACTERISTICS (TJ =25oC, VDD=13V, unless otherwise specified)
POWER SECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVDSS Drain-Source Voltage ID =1 mA VCOMP =0V
for VIPer20/SP/DIP
for VIPer20A/ASP/DIP (see fig.5)
IDSS Off-State Drain Current VCOMP =0V TJ=125oC
VDS= 620V
for VIPer20/SP/DIP
VDS= 700V
for VIPer20A/ASP/ADIP
RDS(on) Static Drain Sourceon
Resistance =0.4A
for VIPer20/SP/DIP
for VIPer20A/ASP/ADIP =0.4A TJ =100oC
for VIPer20/SP/DIP
for VIPer20A/ASP/ADIP
15.5 Fall Time ID= 0.2A Vin =300V(1)
(see fig.3)
100 ns Rise Time ID =0.4A Vin= 300V(1)
(see fig.3) ns
COSS Output Capacitance VDS =25V 90 pF
(1)On Inductive Load, Clamped.
SUPPLY SECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
IDDch Start-up Charging
Current
VDD =5V VDS =70V
(see fig.2 and fig. 15) mA
IDD0 Operating Supply Current VDD =12V, FSW =0 KHz
(see fig.2) 16 mA
IDD1 Operating Supply Current VDD =12V, FSW =100 KHz 13 mA
IDD2 Operating Supply Current VDD =12V, FSW =200 KHz 14 mA
VDDoff Undervoltage Shutdown (see fig.2) 7.5 8 V
VDDon Undervoltage Reset (see fig.2) 11 12 V
VDDhyst Hysteresis Start-up (see fig.2) 2.4 3 V
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
4/21
ELECTRICAL CHARACTERISTICS (continued)
OSCILLATORSECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
FSW Oscillator Frequency
Total Variation= 8.2 KΩ CT =2.4nF
VDD=9 to15V
withRT ± 1% CT ± 5%
(see fig.6 and fig.9) 100 110 KHz
VOSCih Oscillator Peak Voltage 7.1 V
VOSCil Oscillator Valley Voltage 3.7 V
ERROR AMPLIFIERSECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDDreg VDD Regulation Point ICOMP=0 mA (see fig.1) 12.6 13 13.4 V
ΔVDDreg Total Variation TJ=0to 100o C2 %
GBW Unity Gain Bandwidth From Input= VDDto Output= VCOMP
COMP pinis open (see fig. 10)
150 KHz
AVOL Open Loop Voltage
Gain
COMP pinis open (see fig. 10) 45 52 dB DC Transconductance VCOMP= 2.5V (see fig.1) 1.1 1.5 1.9 mA/V
VCOMPLO Output Low Level ICOMP =-400 μAVDD =14V 0.2 V
VCOMPHI Output High Level ICOMP= 400 μAVDD =12V 4.5 V
ICOMPLO Output Low Current
Capability
VCOMP =2.5V VDD=14V -600 μA
ICOMPHI Output High Current
Capability
VCOMP =2.5V VDD=12V 600 μA
PWM COMPARATORSECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
HID ΔVCOMP/ΔIDpeak VCOMP=1to3V 4.2 6 7.8 V/A
VCOMPoff VCOMP offset IDpeak =10 mA 0.5 V
IDpeak Peak Current Limitation VDD=12V COMP pin open 0.5 0.67 0.9 A Current Sense Delay turn-off=1A 250 ns Blanking Time 250 360 ns
ton(min) Minimumon Time 350 ns
SHUTDOWN AND OVERTEMPERATURE SECTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VCOMPth Restart threshold (see fig.4) 0.5 V
tDISsu Disable SetUp Time (see fig.4) 1.7 5 μs
Ttsd Thermal Shutdown
Temperature
(see fig.8) 140 170 190 oC
Thyst Thermal Shutdown
Hysteresis
(see fig.8) 40 oC
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
5/21
Figure 1:VDD RegulationPoint
ICOMP
ICOMPHI
ICOMPLO
VDDreg
VDD
Slope=in mA/V
FC00150
Figure3: TransitionTime
VDS tr
10%Ipeak
10%VD
90%VD
FC00160
Figure2: Undervoltage Lockout
VDDon
IDDch
IDD0
VDDVDDoff
VDS=70V
Fsw=0
IDD
VDDhyst
FC00170
Figure4: Shut Down Action
VCOMP
VOSC
tDISsu
ENABLE
DISABLE
ENABLE
VCOMPth
FC00060
Figure5: BreakdownVoltagevs Temperature Figure6: Typical Frequency Variation
Temperature ( C)
FC00180 204060 80 100 1200.95
BVDSS
(Normalized)
Temperature ( C) 20 40 60 80 100 120 140-5
FC00190
(%)
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
6/21
Figure8: OvertemperatureProtection
Vdd
Vcomp
Ttsd
Ttsd-Thyst
Vddon
Vddoff
SC10191
Figure7: Start-upWaveforms
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
7/21
Figure9: Oscillator 2 3 5 10 20 30 5030
1,000 (kΩ)
Frequency
(kHz)
Oscillator frequencyvsRt andCt =1.5nF=2.7nF
Ct=4.7nF= 10nF
FC00030FC00030 2 3 5 10 20 30 500.5
0.9 (kΩ)
Dmax
Maximum duty cyclevsRt FC00040
OSC
VDD
~360
CLK
FC00050
ForRT> 1.2 KΩ:SW= 2.3TCT MAX MAX=1− 550T− 150
RecommendedD MAX values:
100KHz:> 80%
200KHz:> 70%
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
8/21
Figure 10: ErrorAmplifier Frequency Response
0.001 0.01 0.1 1 10 100 1,000(20)
Frequency (kHz)
Voltage
Gain
(dB)
RCOMP=+∞
RCOMP= 270k
RCOMP= 82k
RCOMP= 27k
RCOMP= 12k
FC00200
Figure 11: ErrorAmplifier Phase Response
0.001 0.01 0.1 1 10 100 1,000(50)
Frequency (kHz)
Phase
RCOMP=+∞
RCOMP= 270k
RCOMP= 82k
RCOMP= 27k
RCOMP= 12k
FC00210
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
9/21
Figure 12: AvalanceTest Circuit
FC00196
VIPer20
13V
OSC
COMP SOURCE
DRAINVDD
BT2
12V
47uF
16Vx STHV102FIin parallel
1mH
GENERATORINPUT
500usPULSE
BT1
0to20V
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
10/21
Figure 13: OffLine Power Supply With Auxliary Supply FeedbackIN
+Vcc
GND
BR1
TR2
C10
TR1C7
VIPer2013V
OSC
COMP SOURCE
DRAINVDD
FC00401
C11
Figure 14: OffLine Power Supply With OptocouplerFeedbackIN
BR1
TR2
C10
TR1C7
+Vcc
GND
VIPer20
ISO113V
OSC
COMP SOURCE
DRAINVDD
FC00411
C11
VIPer20/SP/DIP- VIPer20A/ASP/ADIP
11/21

Partno	Mfg	Dc	Qty	Available	Descript
VIPER20ASP	STM	N/a	12500	avai	SMPS PRIMARY I.C.
VIPER20ASP	ST	N/a	869	avai	SMPS PRIMARY I.C.
VIPER20SP	ST	N/a	482	avai	SMPS PRIMARY I.C.